--- src/mesa/drivers/dri/i965/brw_vec4.h | 4 +- src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 109 +++++++++++++---------- 2 files changed, 66 insertions(+), 47 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h index a86972a..3a1eb12 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.h +++ b/src/mesa/drivers/dri/i965/brw_vec4.h @@ -36,6 +36,7 @@ extern "C" { #include "brw_context.h" #include "brw_eu.h" +#include "intel_asm_printer.h" #ifdef __cplusplus }; /* extern "C" */ @@ -650,7 +651,8 @@ public: const unsigned *generate_assembly(exec_list *insts, unsigned *asm_size); private: - void generate_code(exec_list *instructions); + void generate_code(exec_list *instructions, int *num_annotations, + struct annotation **annotation); void generate_vec4_instruction(vec4_instruction *inst, struct brw_reg dst, struct brw_reg *src); diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp index a91bfe7..2176de4 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp @@ -21,6 +21,7 @@ */ #include "brw_vec4.h" +#include "brw_cfg.h" extern "C" { #include "brw_eu.h" @@ -1260,12 +1261,9 @@ vec4_generator::generate_vec4_instruction(vec4_instruction *instruction, } void -vec4_generator::generate_code(exec_list *instructions) +vec4_generator::generate_code(exec_list *instructions, int *num_annotations, + struct annotation **annotation) { - int last_native_insn_offset = 0; - const char *last_annotation_string = NULL; - const void *last_annotation_ir = NULL; - if (unlikely(debug_flag)) { if (shader_prog) { fprintf(stderr, "Native code for %s vertex shader %d:\n", @@ -1276,32 +1274,52 @@ vec4_generator::generate_code(exec_list *instructions) } } + int block_num = 0; + int ann_num = 0; + int ann_size = 1024; + cfg_t *cfg = NULL; + struct annotation *ann = NULL; + + if (unlikely(debug_flag)) { + cfg = new(mem_ctx) cfg_t(instructions); + ann = rzalloc_array(NULL, struct annotation, ann_size); + } + foreach_list(node, instructions) { vec4_instruction *inst = (vec4_instruction *)node; struct brw_reg src[3], dst; if (unlikely(debug_flag)) { - if (last_annotation_ir != inst->ir) { - last_annotation_ir = inst->ir; - if (last_annotation_ir) { - fprintf(stderr, " "); - if (shader_prog) { - ((ir_instruction *) last_annotation_ir)->fprint(stderr); - } else { - const prog_instruction *vpi; - vpi = (const prog_instruction *) inst->ir; - fprintf(stderr, "%d: ", (int)(vpi - prog->Instructions)); - _mesa_fprint_instruction_opt(stderr, vpi, 0, - PROG_PRINT_DEBUG, NULL); - } - fprintf(stderr, "\n"); - } - } - if (last_annotation_string != inst->annotation) { - last_annotation_string = inst->annotation; - if (last_annotation_string) - fprintf(stderr, " %s\n", last_annotation_string); - } + if (ann_num == ann_size) { + ann_size *= 2; + ann = reralloc(NULL, ann, struct annotation, ann_size); + } + + ann[ann_num].offset = p->next_insn_offset; + ann[ann_num].ir = inst->ir; + ann[ann_num].annotation = inst->annotation; + + if (cfg->blocks[block_num]->start == inst) { + ann[ann_num].block_start = cfg->blocks[block_num]; + } + + /* There is no hardware DO instruction on Gen6+, so since DO always + * starts a basic block, we need to set the .block_start of the next + * instruction's annotation with a pointer to the bblock started by + * the DO. + * + * There's also only complication from emitting an annotation without + * a corresponding hardware instruction to disassemble. + */ + if (brw->gen >= 6 && inst->opcode == BRW_OPCODE_DO) { + ann_num--; + } + + if (cfg->blocks[block_num]->end == inst) { + ann[ann_num].block_end = cfg->blocks[block_num]; + block_num++; + } + ann_num++; } for (unsigned int i = 0; i < 3; i++) { @@ -1332,38 +1350,37 @@ vec4_generator::generate_code(exec_list *instructions) if (inst->no_dd_check) last->header.dependency_control |= BRW_DEPENDENCY_NOTCHECKED; } - - if (unlikely(debug_flag)) { - brw_disassemble(brw, p->store, - last_native_insn_offset, p->next_insn_offset, stderr); - } - - last_native_insn_offset = p->next_insn_offset; - } - - if (unlikely(debug_flag)) { - fprintf(stderr, "\n"); } brw_set_uip_jip(p); - /* OK, while the INTEL_DEBUG=vs above is very nice for debugging VS - * emit issues, it doesn't get the jump distances into the output, - * which is often something we want to debug. So this is here in - * case you're doing that. - */ - if (0 && unlikely(debug_flag)) { - brw_disassemble(brw, p->store, 0, p->next_insn_offset, stderr); + if (unlikely(debug_flag)) { + if (ann_num == ann_size) { + ann = reralloc(NULL, ann, struct annotation, ann_size + 1); + } + ann[ann_num].offset = p->next_insn_offset; } + *num_annotations = ann_num; + *annotation = ann; } const unsigned * vec4_generator::generate_assembly(exec_list *instructions, unsigned *assembly_size) { + struct annotation *annotation; + int num_annotations; + brw_set_access_mode(p, BRW_ALIGN_16); - generate_code(instructions); - brw_compact_instructions(p, 0, 0, NULL); + generate_code(instructions, &num_annotations, &annotation); + brw_compact_instructions(p, 0, num_annotations, annotation); + + if (unlikely(debug_flag)) { + dump_assembly(p->store, num_annotations, annotation, brw, prog, + brw_disassemble); + ralloc_free(annotation); + } + return brw_get_program(p, assembly_size); } -- 1.8.3.2 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev