Churn now to reduce churn later.
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
---
src/mesa/drivers/dri/i965/brw_batch.h | 34 +++++++++++++++
src/mesa/drivers/dri/i965/brw_binding_tables.c | 3 +-
src/mesa/drivers/dri/i965/brw_context.c | 3 +-
.../drivers/dri/i965/brw_performance_monitor.c | 11 +++--
src/mesa/drivers/dri/i965/brw_program.c | 8 ++--
src/mesa/drivers/dri/i965/brw_queryobj.c | 6 +--
src/mesa/drivers/dri/i965/brw_state_cache.c | 6 +--
src/mesa/drivers/dri/i965/gen6_queryobj.c | 2 +-
src/mesa/drivers/dri/i965/gen6_sol.c | 4 +-
src/mesa/drivers/dri/i965/intel_batchbuffer.c | 3 +-
src/mesa/drivers/dri/i965/intel_buffer_objects.c | 16 ++++----
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 48 +++++++++++-----------
src/mesa/drivers/dri/i965/intel_upload.c | 4 +-
13 files changed, 87 insertions(+), 61 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_batch.h
b/src/mesa/drivers/dri/i965/brw_batch.h
index 849a442..705f2f9 100644
--- a/src/mesa/drivers/dri/i965/brw_batch.h
+++ b/src/mesa/drivers/dri/i965/brw_batch.h
@@ -99,6 +99,40 @@ typedef struct brw_batch {
struct set *render_cache;
} brw_batch;
+inline static brw_bo *brw_bo_create(brw_batch *batch,
+ const char *name,
+ uint64_t size,
+ uint64_t alignment,
+ unsigned flags)
+{
+ return drm_intel_bo_alloc(batch->bufmgr, name, size, alignment);
+}
+
+inline static brw_bo *brw_bo_create_tiled(brw_batch *batch,
+ const char *name,
+ uint32_t width,
+ uint32_t height,
+ uint32_t cpp,
+ uint32_t *tiling,
+ uint32_t *pitch,
+ unsigned flags)
+{
+ unsigned long __pitch;
+ brw_bo *bo = drm_intel_bo_alloc_tiled(batch->bufmgr, name,
+ width, height, cpp,
+ tiling, &__pitch,
+ flags);
+ *pitch = __pitch;
+ return bo;
+}
+
+inline static brw_bo *brw_bo_create_from_name(brw_batch *batch,
+ const char *name,
+ uint32_t global_name)
+{
+ return drm_intel_bo_gem_create_from_name(batch->bufmgr, name, global_name);
+}
+
inline static brw_bo *brw_bo_get(brw_bo *bo)
{
drm_intel_bo_reference(bo);
diff --git a/src/mesa/drivers/dri/i965/brw_binding_tables.c
b/src/mesa/drivers/dri/i965/brw_binding_tables.c
index c03dc59..1deed23 100644
--- a/src/mesa/drivers/dri/i965/brw_binding_tables.c
+++ b/src/mesa/drivers/dri/i965/brw_binding_tables.c
@@ -328,8 +328,7 @@ gen7_enable_hw_binding_tables(struct brw_context *brw)
* "A maximum of 16,383 Binding tables are allowed in any batch buffer"
*/
static const int max_size = 16383 * 4;
- brw->hw_bt_pool.bo = drm_intel_bo_alloc(brw->batch.bufmgr, "hw_bt",
- max_size, 64);
+ brw->hw_bt_pool.bo = brw_bo_create(&brw->batch, "hw_bt", max_size, 64,
0);
brw->hw_bt_pool.next_offset = 0;
}
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index ffc3b1f..21e6090 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -1358,8 +1358,7 @@ intel_process_dri2_buffer(struct brw_context *brw,
buffer->cpp, buffer->pitch);
}
- bo = drm_intel_bo_gem_create_from_name(brw->batch.bufmgr, buffer_name,
- buffer->name);
+ bo = brw_bo_create_from_name(&brw->batch, buffer_name, buffer->name);
if (!bo) {
fprintf(stderr,
"Failed to open BO for returned DRI2 buffer "
diff --git a/src/mesa/drivers/dri/i965/brw_performance_monitor.c
b/src/mesa/drivers/dri/i965/brw_performance_monitor.c
index 4795861..4d54fa2 100644
--- a/src/mesa/drivers/dri/i965/brw_performance_monitor.c
+++ b/src/mesa/drivers/dri/i965/brw_performance_monitor.c
@@ -1101,13 +1101,12 @@ brw_begin_perf_monitor(struct gl_context *ctx,
* wasting memory for contexts that don't use performance monitors.
*/
if (!brw->perfmon.bookend_bo) {
- brw->perfmon.bookend_bo = drm_intel_bo_alloc(brw->batch.bufmgr,
- "OA bookend BO",
- BOOKEND_BO_SIZE_BYTES,
64);
+ brw->perfmon.bookend_bo = brw_bo_create(&brw->batch, "OA bookend BO",
+ BOOKEND_BO_SIZE_BYTES, 64, 0);
}
- monitor->oa_bo =
- drm_intel_bo_alloc(brw->batch.bufmgr, "perf. monitor OA bo", 4096,
64);
+ monitor->oa_bo = brw_bo_create(&brw->batch, "perf. monitor OA bo",
+ 4096, 64, 0);
#ifdef DEBUG
/* Pre-filling the BO helps debug whether writes landed. */
drm_intel_bo_map(monitor->oa_bo, true);
@@ -1142,7 +1141,7 @@ brw_begin_perf_monitor(struct gl_context *ctx,
if (monitor_needs_statistics_registers(brw, m)) {
monitor->pipeline_stats_bo =
- drm_intel_bo_alloc(brw->batch.bufmgr, "perf. monitor stats bo", 4096,
64);
+ brw_bo_create(&brw->batch, "perf. monitor stats bo", 4096, 64, 0);
/* Take starting snapshots. */
snapshot_statistics_registers(brw, monitor, 0);
diff --git a/src/mesa/drivers/dri/i965/brw_program.c
b/src/mesa/drivers/dri/i965/brw_program.c
index 687bc46..22abea7 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -271,7 +271,7 @@ brw_get_scratch_bo(struct brw_context *brw,
}
if (!old_bo) {
- *scratch_bo = drm_intel_bo_alloc(brw->batch.bufmgr, "scratch bo", size,
4096);
+ *scratch_bo = brw_bo_create(&brw->batch, "scratch bo", size, 4096, 0);
}
}
@@ -299,9 +299,9 @@ void
brw_init_shader_time(struct brw_context *brw)
{
const int max_entries = 2048;
- brw->shader_time.bo =
- drm_intel_bo_alloc(brw->batch.bufmgr, "shader time",
- max_entries * SHADER_TIME_STRIDE * 3, 4096);
+ brw->shader_time.bo = brw_bo_create(&brw->batch, "shader time",
+ max_entries * SHADER_TIME_STRIDE * 3,
+ 4096, 0);
brw->shader_time.names = rzalloc_array(brw, const char *, max_entries);
brw->shader_time.ids = rzalloc_array(brw, int, max_entries);
brw->shader_time.types = rzalloc_array(brw, enum shader_time_shader_type,
diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c
b/src/mesa/drivers/dri/i965/brw_queryobj.c
index cb0c210..29ec56a 100644
--- a/src/mesa/drivers/dri/i965/brw_queryobj.c
+++ b/src/mesa/drivers/dri/i965/brw_queryobj.c
@@ -236,7 +236,7 @@ brw_begin_query(struct gl_context *ctx, struct
gl_query_object *q)
* the system was doing other work, such as running other applications.
*/
brw_bo_put(query->bo);
- query->bo = drm_intel_bo_alloc(brw->batch.bufmgr, "timer query", 4096,
4096);
+ query->bo = brw_bo_create(&brw->batch, "timer query", 4096, 4096, 0);
brw_write_timestamp(brw, query->bo, 0);
break;
@@ -394,7 +394,7 @@ ensure_bo_has_space(struct gl_context *ctx, struct
brw_query_object *query)
brw_queryobj_get_results(ctx, query);
}
- query->bo = drm_intel_bo_alloc(brw->batch.bufmgr, "query", 4096, 1);
+ query->bo = brw_bo_create(&brw->batch, "query", 4096, 0, 0);
query->last_index = 0;
}
}
@@ -480,7 +480,7 @@ brw_query_counter(struct gl_context *ctx, struct
gl_query_object *q)
assert(q->Target == GL_TIMESTAMP);
brw_bo_put(query->bo);
- query->bo = drm_intel_bo_alloc(brw->batch.bufmgr, "timestamp query", 4096,
4096);
+ query->bo = brw_bo_create(&brw->batch, "timestamp query", 4096, 4096, 0);
brw_write_timestamp(brw, query->bo, 0);
query->flushed = false;
diff --git a/src/mesa/drivers/dri/i965/brw_state_cache.c
b/src/mesa/drivers/dri/i965/brw_state_cache.c
index 0081219..e2dbcc6 100644
--- a/src/mesa/drivers/dri/i965/brw_state_cache.c
+++ b/src/mesa/drivers/dri/i965/brw_state_cache.c
@@ -170,7 +170,7 @@ brw_cache_new_bo(struct brw_cache *cache, uint32_t new_size)
struct brw_context *brw = cache->brw;
brw_bo *new_bo;
- new_bo = drm_intel_bo_alloc(brw->batch.bufmgr, "program cache", new_size,
64);
+ new_bo = brw_bo_create(&brw->batch, "program cache", new_size, 64, 0);
if (brw->has_llc)
drm_intel_gem_bo_map_unsynchronized(new_bo);
@@ -354,9 +354,7 @@ brw_init_caches(struct brw_context *brw)
cache->items =
calloc(cache->size, sizeof(struct brw_cache_item *));
- cache->bo = drm_intel_bo_alloc(brw->batch.bufmgr,
- "program cache",
- 4096, 64);
+ cache->bo = brw_bo_create(&brw->batch, "program cache", 4096, 64, 0);
if (brw->has_llc)
drm_intel_gem_bo_map_unsynchronized(cache->bo);
diff --git a/src/mesa/drivers/dri/i965/gen6_queryobj.c
b/src/mesa/drivers/dri/i965/gen6_queryobj.c
index 2178ca5..23b9514 100644
--- a/src/mesa/drivers/dri/i965/gen6_queryobj.c
+++ b/src/mesa/drivers/dri/i965/gen6_queryobj.c
@@ -279,7 +279,7 @@ gen6_begin_query(struct gl_context *ctx, struct
gl_query_object *q)
/* Since we're starting a new query, we need to throw away old results. */
brw_bo_put(query->bo);
- query->bo = drm_intel_bo_alloc(brw->batch.bufmgr, "query results", 4096,
4096);
+ query->bo = brw_bo_create(&brw->batch, "query results", 4096, 4096, 0);
switch (query->Base.Target) {
case GL_TIME_ELAPSED:
diff --git a/src/mesa/drivers/dri/i965/gen6_sol.c
b/src/mesa/drivers/dri/i965/gen6_sol.c
index 22f350f..0a27d9e 100644
--- a/src/mesa/drivers/dri/i965/gen6_sol.c
+++ b/src/mesa/drivers/dri/i965/gen6_sol.c
@@ -204,9 +204,9 @@ brw_new_transform_feedback(struct gl_context *ctx, GLuint
name)
_mesa_init_transform_feedback_object(&brw_obj->base, name);
brw_obj->offset_bo =
- drm_intel_bo_alloc(brw->batch.bufmgr, "transform feedback offsets", 16,
64);
+ brw_bo_create(&brw->batch, "transform feedback offsets", 4096, 64, 0);
brw_obj->prim_count_bo =
- drm_intel_bo_alloc(brw->batch.bufmgr, "xfb primitive counts", 4096, 64);
+ brw_bo_create(&brw->batch, "xfb primitive counts", 4096, 64, 0);
return &brw_obj->base;
}
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index 1f11036..dd5af71 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -79,8 +79,7 @@ intel_batchbuffer_reset(struct brw_context *brw)
brw_batch_clear_dirty(&brw->batch);
- brw->batch.bo = drm_intel_bo_alloc(brw->batch.bufmgr, "batchbuffer",
- BATCH_SZ, 4096);
+ brw->batch.bo = brw_bo_create(&brw->batch, "batchbuffer", BATCH_SZ, 4096,
0);
if (brw->has_llc) {
drm_intel_bo_map(brw->batch.bo, true);
brw->batch.map = brw->batch.bo->virtual;
diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.c
b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
index b9a36f2..a45f8e0 100644
--- a/src/mesa/drivers/dri/i965/intel_buffer_objects.c
+++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
@@ -100,8 +100,8 @@ static void
alloc_buffer_object(struct brw_context *brw,
struct intel_buffer_object *intel_obj)
{
- intel_obj->buffer = drm_intel_bo_alloc(brw->batch.bufmgr, "bufferobj",
- intel_obj->Base.Size, 64);
+ intel_obj->buffer =
+ brw_bo_create(&brw->batch, "bufferobj", intel_obj->Base.Size, 64, 0);
/* the buffer might be bound as a uniform buffer, need to update it
*/
@@ -285,7 +285,7 @@ brw_buffer_subdata(struct gl_context *ctx,
intel_obj->gpu_active_start,
intel_obj->gpu_active_end);
brw_bo *temp_bo =
- drm_intel_bo_alloc(brw->batch.bufmgr, "subdata temp", size, 64);
+ brw_bo_create(&brw->batch, "subdata temp", size, 64, 0);
drm_intel_bo_subdata(temp_bo, 0, size, data);
@@ -422,11 +422,11 @@ brw_map_buffer_range(struct gl_context *ctx,
const unsigned alignment = ctx->Const.MinMapBufferAlignment;
intel_obj->map_extra[index] = (uintptr_t) offset % alignment;
- intel_obj->range_map_bo[index] = drm_intel_bo_alloc(brw->batch.bufmgr,
- "BO blit temp",
- length +
-
intel_obj->map_extra[index],
- alignment);
+ intel_obj->range_map_bo[index] = brw_bo_create(&brw->batch,
+ "BO blit temp",
+ length +
+
intel_obj->map_extra[index],
+ alignment, 0);
if (brw->has_llc) {
brw_bo_map(brw, intel_obj->range_map_bo[index],
(access & GL_MAP_WRITE_BIT) != 0, "range-map");
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 86aacfb..e7e6a02 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -558,9 +558,9 @@ intel_lower_compressed_format(struct brw_context *brw,
mesa_format format)
}
/* This function computes Yf/Ys tiled bo size, alignment and pitch. */
-static unsigned long
-intel_get_yf_ys_bo_size(struct intel_mipmap_tree *mt, unsigned *alignment,
- unsigned long *pitch)
+static uint64_t
+intel_get_yf_ys_bo_size(struct intel_mipmap_tree *mt,
+ uint32_t *alignment, uint32_t *pitch)
{
const uint32_t bpp = mt->cpp * 8;
const uint32_t aspect_ratio = (bpp == 16 || bpp == 64) ? 2 : 1;
@@ -660,21 +660,19 @@ intel_miptree_create(struct brw_context *brw,
if (layout_flags & MIPTREE_LAYOUT_ACCELERATED_UPLOAD)
alloc_flags |= BO_ALLOC_FOR_RENDER;
- unsigned long pitch;
+ uint32_t pitch;
mt->etc_format = etc_format;
if (mt->tr_mode != INTEL_MIPTREE_TRMODE_NONE) {
- unsigned alignment = 0;
- unsigned long size;
+ uint32_t alignment;
+ uint64_t size;
size = intel_get_yf_ys_bo_size(mt, &alignment, &pitch);
assert(size);
- mt->bo = drm_intel_bo_alloc_for_render(brw->batch.bufmgr, "miptree",
- size, alignment);
+ mt->bo = brw_bo_create(&brw->batch, "miptree", size, alignment, 0);
} else {
- mt->bo = drm_intel_bo_alloc_tiled(brw->batch.bufmgr, "miptree",
- total_width, total_height, mt->cpp,
- &mt->tiling, &pitch,
- alloc_flags);
+ mt->bo = brw_bo_create_tiled(&brw->batch, "miptree",
+ total_width, total_height, mt->cpp,
+ &mt->tiling, &pitch, alloc_flags);
}
mt->pitch = pitch;
@@ -689,9 +687,9 @@ intel_miptree_create(struct brw_context *brw,
mt->tiling = I915_TILING_X;
brw_bo_put(mt->bo);
- mt->bo = drm_intel_bo_alloc_tiled(brw->batch.bufmgr, "miptree",
- total_width, total_height, mt->cpp,
- &mt->tiling, &pitch, alloc_flags);
+ mt->bo = brw_bo_create_tiled(&brw->batch, "miptree",
+ total_width, total_height, mt->cpp,
+ &mt->tiling, &pitch, alloc_flags);
mt->pitch = pitch;
}
@@ -1570,12 +1568,12 @@ intel_gen7_hiz_buf_create(struct brw_context *brw,
}
}
- unsigned long pitch;
+ uint32_t pitch;
uint32_t tiling = I915_TILING_Y;
- buf->bo = drm_intel_bo_alloc_tiled(brw->batch.bufmgr, "hiz",
- hz_width, hz_height, 1,
- &tiling, &pitch,
- BO_ALLOC_FOR_RENDER);
+ buf->bo = brw_bo_create_tiled(&brw->batch, "hiz",
+ hz_width, hz_height, 1,
+ &tiling, &pitch,
+ BO_ALLOC_FOR_RENDER);
if (!buf->bo) {
free(buf);
return NULL;
@@ -1673,12 +1671,12 @@ intel_gen8_hiz_buf_create(struct brw_context *brw,
}
}
- unsigned long pitch;
+ uint32_t pitch;
uint32_t tiling = I915_TILING_Y;
- buf->bo = drm_intel_bo_alloc_tiled(brw->batch.bufmgr, "hiz",
- hz_width, hz_height, 1,
- &tiling, &pitch,
- BO_ALLOC_FOR_RENDER);
+ buf->bo = brw_bo_create_tiled(&brw->batch, "hiz",
+ hz_width, hz_height, 1,
+ &tiling, &pitch,
+ BO_ALLOC_FOR_RENDER);
if (!buf->bo) {
free(buf);
return NULL;
diff --git a/src/mesa/drivers/dri/i965/intel_upload.c
b/src/mesa/drivers/dri/i965/intel_upload.c
index 4ec7e05..435f56f 100644
--- a/src/mesa/drivers/dri/i965/intel_upload.c
+++ b/src/mesa/drivers/dri/i965/intel_upload.c
@@ -100,8 +100,8 @@ intel_upload_space(struct brw_context *brw,
}
if (!brw->upload.bo) {
- brw->upload.bo = drm_intel_bo_alloc(brw->batch.bufmgr, "streamed data",
- MAX2(INTEL_UPLOAD_SIZE, size), 4096);
+ brw->upload.bo = brw_bo_create(&brw->batch, "streamed data",
+ MAX2(INTEL_UPLOAD_SIZE, size), 4096, 0);
if (brw->has_llc)
drm_intel_bo_map(brw->upload.bo, true);
else
--
2.5.0
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