I'm sorry this reply is so late. I completely forgot about this thread... On Mon, 2 Nov 2009 10:35:16 -0500 "Li, RichardZ" <richardz...@amd.com> wrote:
>
> Yes, you are right. When the compiler code was put there, as Alex said,
> we hope to get everything worked. Certainly emit alu instruction based
> on write-mask is the must-do tune up for current compiler. We are
> preparing compiling capability for r6/r7 driver for mesa glsl IL to hw
> instructions. Originally I hoped could tune up compiler after it.
> Surely any optimizations are welcome, especially this one. I hope
> current code is only a start point for us to make its graphics run
> better together. :-)
>
Getting things working first, and then getting them fast is definitely
the right approach. I think everyone is familiar with the evils of
premature optimisations. :)
That said, I think we need to get the basic architecture right or risk
having to rewrite a lot of the compiler when trying to optimise it.
The more I've been thinking about it, the more it feels right to have
the internal representation based around elements as opposed to
vectors. The frontend of the compiler would then generate these element
based operations, and we'd have an instruction scheduler that organises
them efficiently.
In the first version that scheduler would just make sure that
instructions are tagged in a way that gives proper execution. That
shouldn't require any reordering and therefore shouldn't be that messy
to implement. Later we can improve the scheduler to pack instructions
more tightly.
As for Mesa vs Gallium, I guess making a really good compiler is only
important for Gallium as that is the long term solution and Mesa is
just a stop-gap.
I'm not sure how the GLSL compiler you are working on looks like, nor
do I know what design Corbin's Gallium code uses, but I'm hoping we're
all pulling in the same direction. :)
Rgds
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-- Pierre Ossman
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