Roel Kluin wrote: > These can never be true. > > Signed-off-by: Roel Kluin <roel.kl...@gmail.com> > --- > src/gallium/drivers/i965/brw_wm_emit.c | 2 +- > src/mesa/drivers/dri/i915/intel_tris.c | 2 +- > src/mesa/drivers/dri/i965/brw_wm_emit.c | 2 +- > 3 files changed, 3 insertions(+), 3 deletions(-) > > see commit f67748038935e609aa85450b20d550b4813c9429 for > the change in src/mesa/drivers/dri/i915/intel_tris.c > > diff --git a/src/gallium/drivers/i965/brw_wm_emit.c > b/src/gallium/drivers/i965/brw_wm_emit.c > index 7e57d03..7e35ee1 100644 > --- a/src/gallium/drivers/i965/brw_wm_emit.c > +++ b/src/gallium/drivers/i965/brw_wm_emit.c > @@ -691,7 +691,7 @@ static void emit_xpd( struct brw_compile *p, > { > GLuint i; > > - assert(!(mask & BRW_WRITEMASK_W) == BRW_WRITEMASK_X); > + assert((mask & BRW_WRITEMASK_W) != BRW_WRITEMASK_X); > > for (i = 0 ; i < 3; i++) { > if (mask & (1<<i)) { > diff --git a/src/mesa/drivers/dri/i915/intel_tris.c > b/src/mesa/drivers/dri/i915/intel_tris.c > index 63c5ae9..a182f68 100644 > --- a/src/mesa/drivers/dri/i915/intel_tris.c > +++ b/src/mesa/drivers/dri/i915/intel_tris.c > @@ -221,7 +221,7 @@ void intel_flush_prim(struct intel_context *intel) > intel->prim.count = 0; > offset = intel->prim.start_offset; > intel->prim.start_offset = intel->prim.current_offset; > - if (!intel->gen >= 3) > + if (intel->gen < 3) > intel->prim.start_offset = ALIGN(intel->prim.start_offset, 128); > intel->prim.flush = NULL; > > diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c > b/src/mesa/drivers/dri/i965/brw_wm_emit.c > index cc1052f..91ac37c 100644 > --- a/src/mesa/drivers/dri/i965/brw_wm_emit.c > +++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c > @@ -692,7 +692,7 @@ void emit_xpd(struct brw_compile *p, > { > GLuint i; > > - assert(!(mask & WRITEMASK_W) == WRITEMASK_X); > + assert((mask & WRITEMASK_W) != WRITEMASK_X); > > for (i = 0 ; i < 3; i++) { > if (mask & (1<<i)) { > . >
I believe the first and third assertions should read: assert(!(mask & BRW_WRITEMASK_W) == BRW_WRITEMASK_W); I'll fix those. The second patch to intel_tris.c no longer applicable to Mesa 7.7 and later. -Brian ------------------------------------------------------------------------------ This SF.Net email is sponsored by the Verizon Developer Community Take advantage of Verizon's best-in-class app development support A streamlined, 14 day to market process makes app distribution fast and easy Join now and get one step closer to millions of Verizon customers http://p.sf.net/sfu/verizon-dev2dev _______________________________________________ Mesa3d-dev mailing list Mesa3d-dev@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/mesa3d-dev