Nathan,
May I ask where your gem0 clock is sourced from?
My gem0 clock is sourced from iopll and my clock tree looks like this:
ps_clk
iopll_int
iopll
gem0_mux
gem0_div0
gem0_div1
gem0_emio_mux
gem0
armpll_int
armpll
cpu_mux
cpu_div
cpu_1x_div
cpu_1x
gem0_aper
I'm wondering if the gem0_emio_mux before gem0 is the issue (I'm not
going through EMIO).
Also, my ps7_ethernet0 node has this in it:
clock-names = "ref_clk", "aper_clk";
clocks = <&clkc 13>, <&clkc 30>;
The "30" in clocks is referring to gem0_aper, which looks out of place
in the clock tree (being under armpll instead of iopll).
On Mon, Aug 8, 2016 at 12:08 PM, Edward Wingate <edwinga...@gmail.com> wrote:
> On Sun, Jul 31, 2016 at 6:26 AM, Nathan Rossi <nat...@nathanrossi.com> wrote:
>>
>> I tested this with both the emacps and the macb driver (linux-xlnx
>> kernel v2016.2, on a ZYBO). Both advertise and link correctly with a
>> 100M switch and forced advert 100M with a 1G switch, and packets are
>> transmitted and received correctly.
>
> Appreciate the confirmation, Nathan.
>
>> If you are having issues with this before diving into the board/hw/etc
>> testing double check your clock setup (and that it is propagated to
>> FSBL/SPL correctly), and/or EMIO setup if you are routing through PL.
>
> I'll be doing so in coming days. But despite the initial clock setup
> from FSBL, won't Linux mess with the registers during boot and
> ethernet initialization? I wonder, can I change the link speed while
> in u-boot to see if it works there? I'm tftping in u-boot
> successfully, probably at 1Gbps.
--
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