> On Jul 18, 2017, at 16:39, Giordon Stark <kra...@gmail.com> wrote:
> 
> Hi all,
> 
> In the Zynq-7000 series, the default DTS provided here 
> (https://github.com/Xilinx/linux-xlnx/blob/1aacedaf5318e8ae39cc02916647495c1c2992ab/arch/arm/boot/dts/zynq-7000.dtsi#L77-L83
>  
> <https://github.com/Xilinx/linux-xlnx/blob/1aacedaf5318e8ae39cc02916647495c1c2992ab/arch/arm/boot/dts/zynq-7000.dtsi#L77-L83>)
>  comes with XADC baked in by default...
> 
> However, in the ZynqMP series, the default DTS provided here 
> (https://github.com/Xilinx/linux-xlnx/blob/1aacedaf5318e8ae39cc02916647495c1c2992ab/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
>  
> <https://github.com/Xilinx/linux-xlnx/blob/1aacedaf5318e8ae39cc02916647495c1c2992ab/arch/arm64/boot/dts/xilinx/zynqmp.dtsi>)
>  does not come with XADC baked in. It's not clear to me how to add this in 
> using a "default project" (MPSoC process IPCore with PS-PL clocks disabled) 
> and the system.dtb provided by the zcu102-zynqmp machine option in bitbake.
> 
> Would I, instead, need to add the XADC IP Core into my project, and then look 
> at the physical addresses and figure out how to add it in my DTS? Or is there 
> some other way to do it with the default machine, or should I be making my 
> own machine+dts files?

I think the equivalent is the "sysmon" or "AMS" in zynqmp...

If it helps, this is what I have in "my-machine.dts" (fake name) :

#include "zynqmp.dtsi"

[...]

&xilinx_ams {
        status = "okay";
        #io-channel-cells = <1>;
};

&ams_ps {
        status = "okay";
};

&ams_pl {
        status = "okay";
        reg = <0x0 0x81080400 0x0 0x400>;
        xlnx,ext-channels {
                #address-cells = <1>;
                #size-cells = <0>;
                channel@AMS_PL_OPT_VCCVPVN {
                        reg = <AMS_PL_OPT_VCCVPVN>;
                        #define MY_MACHINE_VCC3V3 23
                };
                channel@AMS_PL_OPT_VCCAUX3 {
                        reg = <AMS_PL_OPT_VCCAUX3>;
                        #define MY_MACHINE_VCC1V2 24
                };
                channel@AMS_PL_OPT_VCCAUX11 {
                        reg = <AMS_PL_OPT_VCCAUX11>;
                        #define MY_MACHINE_VCC5V 25
                };
                channel@AMS_PL_OPT_VCCAUX6 {
                        reg = <AMS_PL_OPT_VCCAUX6>;
                        #define MY_MACHINE_HV_VC 26
                };
        };
};

The channel configs in PL are specific to our design. And we export those 
through iio-hwmon to get them with "lmsensors":

/ {
        iio-hwmon@0 {
                compatible = "iio-hwmon";
                io-channels = <&xilinx_ams AMS_REMOTE_TEMP>,
                                <&xilinx_ams AMS_PL_TEMP>,
                                <&xilinx_ams AMS_VCCPSINTFP>,
                                <&xilinx_ams AMS_VCCPSDDR>,
                                <&xilinx_ams MY_MACHINE_VCC1V2>,
                                <&xilinx_ams AMS_VCCPSAUX>,
                                <&xilinx_ams AMS_VCCPSIO0>,
                                <&xilinx_ams MY_MACHINE_VCC3V3>,
                                <&xilinx_ams AMS_VCCPSIO2>,
                                <&xilinx_ams MY_MACHINE_VCC5V>,
                                <&xilinx_ams MY_MACHINE_HV_VC>;
                io-channel-names = "CPU",
                                "FPGA",
                                "VCC0V85",
                                "VCC1V1",
                                "VCC1V2",
                                "VCC1V8",
                                "VCC1V8IO",
                                "VCC3V3",
                                "VCC3V3IO",
                                "VCC5V",
                                "HV_VC";
        };

};

Cheers!
-- 
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