Hi Mike,
We tested by loading both the vivado generated and bootgen generated bitstreams using 2018.3 and it worked fine, we are able to see Done and leds glowing as per our design. Is it a custom board or zcu102? Do you need this patch on thud? https://github.com/Xilinx/meta-xilinx/commit/2c98fa11ccf33b6d9a550bebf50d2a2a876f9afb Thanks, Manju > -----Original Message----- > From: meta-xilinx-boun...@yoctoproject.org [mailto:meta-xilinx- > boun...@yoctoproject.org] On Behalf Of Mike Looijmans > Sent: Wednesday, March 13, 2019 6:10 AM > To: meta-xil...@lists.yoctoproject.org > Subject: [meta-xilinx] Loading FPGA firmware broken in 2018.3 > > With the 2018.1 version of u-boot, atf and pmu this worked okay. > > With the "thud" release and 2018.3, loading the FPGA no longer works: > > ZynqMP> load mmc $sdbootdev:2 0x100000 /lib/firmware/fpga.bin > 19311092 bytes read in 1900 ms (9.7 MiB/s) > ZynqMP> fpga load 0 0x100000 $filesize > ZynqMP> md 0x100000 > 00100000: ffffffff ffffffff ffffffff ffffffff ................ > 00100010: ffffffff ffffffff ffffffff ffffffff ................ > 00100020: ffffffff ffffffff ffffffff ffffffff ................ > 00100030: ffffffff ffffffff ffffffff ffffffff ................ > 00100040: 000000bb 11220044 ffffffff ffffffff ....D."......... > 00100050: aa995566 20000000 20000000 30022001 fU..... ... . .0 > 00100060: 00000000 30020001 00000000 30008001 .......0.......0 > 00100070: 00000000 20000000 30008001 00000007 ....... ...0.... > 00100080: 20000000 20000000 30002001 00000000 ... ... . .0.... > 00100090: 30026001 00000000 30012001 38003fe5 .`.0..... .0.?.8 > 001000a0: 3001c001 00400000 30018001 04a5a093 > ...0..@....0<mailto:...0..@....0>.... > 001000b0: 30008001 00000009 20000000 3000c001 ...0....... ...0 > 001000c0: 00000001 3000a001 00000101 3000c001 .......0.......0 > 001000d0: 00000000 30030001 00000000 20000000 .......0....... > 001000e0: 20000000 20000000 20000000 20000000 ... ... ... ... > 001000f0: 20000000 20000000 20000000 30002001 ... ... ... . .0 > ZynqMP> > > > No error is displayed, but the FPGA remains unprogrammed (as indicated by the > PROG_DONE pin). > > Reverting to previous sumo version makes it work again. > -- > _______________________________________________ > meta-xilinx mailing list > meta-xilinx@yoctoproject.org<mailto:meta-xilinx@yoctoproject.org> > https://lists.yoctoproject.org/listinfo/meta-xilinx
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