On Mon, Apr 20, 2009 at 1:04 PM, Jason Moxham <ja...@njkfrudils.plus.com> wrote: > > replacing the include with inline , > I'm getting desperate , the previous error said the function have two > mains!!!
dummy32.s is .globl cpuid .globl _cpuid cpuid: _cpuid: pushl %esi pushl %ebx movl 16(%esp),%eax .byte 0x0f .byte 0xa2 movl 12(%esp),%esi movl %ebx,(%esi) movl %edx,4(%esi) movl %ecx,8(%esi) popl %ebx popl %esi ret dummy64.s is .globl cpuid .globl _cpuid cpuid: _cpuid: pushq %rbx movq %rsi,%rax .byte 0x0f .byte 0xa2 movl %ebx,(%rdi) movl %edx,4(%rdi) movl %ecx,8(%rdi) popq %rbx ret dummy32.c is #define CONFIG_GUESS 1 #define CONFIG_GUESS_32BIT 1 #define CONFIG_GUESS_64BIT 0 #define FAT32 0 #define FAT64 0 #define INFAT 0 main () { // this should return the microarchitecture , NOT which code path we think is best #if CONFIG_GUESS // use's the stringinzing directive #x so MODELSTR(teddy) expands to modelstr="teddy" #define CPUIS(x) modelstr=#x #define __gmpn_cpuid cpuid #endif #if INFAT #define CPUIS(x) do{TRACE(printf(" "#x"\n"));CPUSETUP_##x;}while(0) #endif char vendor_string[13]; char features[12]; long fms; int family, model, stepping; char *modelstr; __gmpn_cpuid (vendor_string, 0); vendor_string[12] = 0; fms = __gmpn_cpuid (features, 1); family = ((fms >> 8) & 15) + ((fms >> 20) & 0xff); model = ((fms >> 4) & 15) + ((fms >> 12) & 0xf0); stepping = fms & 15; #if CONFIG_GUESS_64BIT modelstr = "x86_64"; #else modelstr = "i486";// shouldn't we make this x86?? #endif if (strcmp (vendor_string, "GenuineIntel") == 0) { switch (family) { #if CONFIG_GUESS_32BIT || FAT32 case 5: if (model <= 2) CPUIS(pentium); if (model >= 4) CPUIS(pentiummmx); break; #endif case 6: #if CONFIG_GUESS_32BIT || FAT32 if (model == 1) { CPUIS(pentiumpro);break;} if (model <= 6) { CPUIS(pentium2);break;} if (model <= 13){ CPUIS(pentium3);break;} if (model == 14){ CPUIS(core);break;} #endif if (model == 15){ CPUIS(core2);break;} if (model == 22){ CPUIS(core2);break;} if (model == 23){ CPUIS(penryn);break;} if (model == 26){ CPUIS(nehalem);break;} if (model == 28){ CPUIS(atom);break;} if (model == 29){ CPUIS(penryn);break;} break; case 15: #if CONFIG_GUESS_64BIT || FAT64 __gmpn_cpuid(features,0x80000001); if ( features[8]&1 ){ CPUIS(netburstlahf);break;} CPUIS(netburst); #endif #if CONFIG_GUESS_32BIT || FAT32 if (model <= 6) { CPUIS(pentium4);break;} int feat = ((int *)features)[2]; if (feat & 1) { CPUIS(prescott);break;} #endif break; } } else if (strcmp (vendor_string, "AuthenticAMD") == 0) { switch (family) { #if CONFIG_GUESS_32BIT || FAT32 case 5: if (model <= 3) { CPUIS(k5);break;} if (model <= 7) { CPUIS(k6);break;} if (model <= 8) { CPUIS(k62);break;} if (model <= 9) { CPUIS(k63);break;} break; case 6: CPUIS(k7); break; #endif case 15: CPUIS(k8); break; case 16: if (model == 2) { CPUIS(k10);break;} // phenom if (model == 4) { CPUIS(k10);break;} //phenom II break; } } #if CONFIG_GUESS_32 || FAT32 else if (strcmp (vendor_string, "CyrixInstead") == 0) { /* Should recognize Cyrix' processors too. */ } else if (strcmp (vendor_string, "CentaurHauls") == 0) { switch (family) { case 6: if (model < 9) { CPUIS(viac3);break;} CPUIS(viac32);break; } } #endif printf ("%s\n", modelstr); return 0;} dummy64.c is #define CONFIG_GUESS 1 #define CONFIG_GUESS_32BIT 0 #define CONFIG_GUESS_64BIT 1 #define FAT32 0 #define FAT64 0 #define INFAT 0 main () { // this should return the microarchitecture , NOT which code path we think is best #if CONFIG_GUESS // use's the stringinzing directive #x so MODELSTR(teddy) expands to modelstr="teddy" #define CPUIS(x) modelstr=#x #define __gmpn_cpuid cpuid #endif #if INFAT #define CPUIS(x) do{TRACE(printf(" "#x"\n"));CPUSETUP_##x;}while(0) #endif char vendor_string[13]; char features[12]; long fms; int family, model, stepping; char *modelstr; __gmpn_cpuid (vendor_string, 0); vendor_string[12] = 0; fms = __gmpn_cpuid (features, 1); family = ((fms >> 8) & 15) + ((fms >> 20) & 0xff); model = ((fms >> 4) & 15) + ((fms >> 12) & 0xf0); stepping = fms & 15; #if CONFIG_GUESS_64BIT modelstr = "x86_64"; #else modelstr = "i486";// shouldn't we make this x86?? #endif if (strcmp (vendor_string, "GenuineIntel") == 0) { switch (family) { #if CONFIG_GUESS_32BIT || FAT32 case 5: if (model <= 2) CPUIS(pentium); if (model >= 4) CPUIS(pentiummmx); break; #endif case 6: #if CONFIG_GUESS_32BIT || FAT32 if (model == 1) { CPUIS(pentiumpro);break;} if (model <= 6) { CPUIS(pentium2);break;} if (model <= 13){ CPUIS(pentium3);break;} if (model == 14){ CPUIS(core);break;} #endif if (model == 15){ CPUIS(core2);break;} if (model == 22){ CPUIS(core2);break;} if (model == 23){ CPUIS(penryn);break;} if (model == 26){ CPUIS(nehalem);break;} if (model == 28){ CPUIS(atom);break;} if (model == 29){ CPUIS(penryn);break;} break; case 15: #if CONFIG_GUESS_64BIT || FAT64 __gmpn_cpuid(features,0x80000001); if ( features[8]&1 ){ CPUIS(netburstlahf);break;} CPUIS(netburst); #endif #if CONFIG_GUESS_32BIT || FAT32 if (model <= 6) { CPUIS(pentium4);break;} int feat = ((int *)features)[2]; if (feat & 1) { CPUIS(prescott);break;} #endif break; } } else if (strcmp (vendor_string, "AuthenticAMD") == 0) { switch (family) { #if CONFIG_GUESS_32BIT || FAT32 case 5: if (model <= 3) { CPUIS(k5);break;} if (model <= 7) { CPUIS(k6);break;} if (model <= 8) { CPUIS(k62);break;} if (model <= 9) { CPUIS(k63);break;} break; case 6: CPUIS(k7); break; #endif case 15: CPUIS(k8); break; case 16: if (model == 2) { CPUIS(k10);break;} // phenom if (model == 4) { CPUIS(k10);break;} //phenom II break; } } #if CONFIG_GUESS_32 || FAT32 else if (strcmp (vendor_string, "CyrixInstead") == 0) { /* Should recognize Cyrix' processors too. */ } else if (strcmp (vendor_string, "CentaurHauls") == 0) { switch (family) { case 6: if (model < 9) { CPUIS(viac3);break;} CPUIS(viac32);break; } } #endif printf ("%s\n", modelstr); return 0;} dummy-346064.s: Assembler messages: dummy-346064.s:5: Error: bad register name `%rbx' dummy-346064.s:6: Error: bad register name `%rsi' dummy-346064.s:9: Error: bad register name `%rdi)' dummy-346064.s:10: Error: bad register name `%rdi)' dummy-346064.s:11: Error: bad register name `%rdi)' dummy-346064.s:12: Error: bad register name `%rbx' dummy-346064.c:8: warning: return type defaults to âintâ dummy-346064.c: In function âmainâ: dummy-346064.c:26: warning: implicit declaration of function âcpuidâ dummy-346064.c:41: warning: implicit declaration of function âstrcmpâ dummy-346064.c:118: warning: implicit declaration of function âprintfâ dummy-346064.c:118: warning: incompatible implicit declaration of built-in function âprintfâ Please report this problem to <supp...@pathscale.com>. Problem report saved as /home/jeffg/.ekopath-bugs/pathcc_error_iIAgPh.i Please review the above file and, if possible, attach it to your problem report. Please review the above file and, if possible, attach it to your problem report. NOW TRYING AGAIN dummy-346032.c:8: warning: return type defaults to âintâ dummy-346032.c: In function âmainâ: dummy-346032.c:26: warning: implicit declaration of function âcpuidâ dummy-346032.c:41: warning: implicit declaration of function âstrcmpâ dummy-346032.c:118: warning: implicit declaration of function âprintfâ dummy-346032.c:118: warning: incompatible implicit declaration of built-in function âprintfâ /tmp/cco.Mvjefr: In function `main': /work/jeffg/mpir-1.1/dummy-346032.c:8: multiple definition of `main' /tmp/cco.Mvjefr:/work/jeffg/mpir-1.1/dummy-346032.c:8: first defined here /tmp/cco.Mvjefr: In function `main': (.text+0x5b): undefined reference to `cpuid' /tmp/cco.Mvjefr: In function `main': (.text+0x76): undefined reference to `cpuid' /tmp/cco.Mvjefr: In function `main': (.text+0x5b): undefined reference to `cpuid' /tmp/cco.Mvjefr: In function `main': (.text+0x76): undefined reference to `cpuid' collect2: ld returned 1 exit status x86_64-unknown-linux-gnu --~--~---------~--~----~------------~-------~--~----~ You received this message because you are subscribed to the Google Groups "mpir-devel" group. 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