At 12:34 28-03-05 -0800, you wrote: >Hi Robert. > >Re: >>>>> >>I presume, that by 9600 baud you mean 9600 bps. So 1.04ms by 9600 >>should give 1000. But it gives 10 000. Something is wrong, isn't it ? > >No. At 9600 bps, _bits_ are sent out every 1/9600s, or every 104us. >But 1 start bit, 8 data bits and 1 stop bit is 10 bits total, >therefore each _byte_ happens every 104us x 10 = 1.04ms. Therefore >you get a Tx INT every 1.04ms. > >> >>So I presume 0.104 ms, which gives 104us. > > >1.04ms. See above. > >>With 115200 it is 12 times less, which is around 8us. >>with MCLK 7372800 one clock tick i 0.13us >> >>Maybe I don't understand sth, but msp430 is almost close to it's limits! >>Cheers >>robert > >At 115200 bps, a Tx INT happens every 86us (1.04ms / 12). That is of >course much faster than the situation at 9600 bps. Most code that >I've seen that runs at these high rates sends data directly and not >via the ISR, because the overhead of getting into and out of the ISR >is too high. Plus, the characters leave very quickly, so the Tx buff >is usually ready for another very soon thereafter.
Just out of curiosity, has anyone tried to use the DMA controller to -sort of- create a UART with a transmit and/or receive buffer? Nico Coesel
