Hardy Griech schrieb:
if the JTAG connector is removed during debugging (CPU halted), the CPU
remains halted (that's the intention of the JTAG debugging IF). No
internal watchdog recovers the MSP430 from the state.
My concern is, if this state (JTAG debugging, CPU halted) could be
generated by radiation or bit flips caused by other reasons.
If this would be the case, an external watchdog would be required
always. My hope is, that JTAG debugging is somehow checksum protected
and thus likelihood of the above event would be (almost) zero.
no it isn't checksum protected. halting the CPU is also described in the
slaa149 application note.
there you also see the state machine and that a few pulses for a "fuse
check" are required. to select the register and halt the cpu a number of
operations are required, pulses on 3 different pins. the likelihood that
this happens by accident is rather small. i've never heard about this
happening.
chris
