Chris Liechti wrote:
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no it isn't checksum protected. halting the CPU is also described in the slaa149 application note.
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ok, I've read it and my concern is still, that some bit flipping due to radiation or other effects my put the msp430 into JTAG halt mode. If I understood slaa149 correctly TCE1 and/or HALT_JTAG in the "JTAG Control Signal Register" are required to stop the CPU. That means a maximum of two bit flips which must not be timely simultaneous!

Any known application note which describes behaviour of the internal MSP430 registers on radiation (this leads to my refresh question!)?

Thanks

Hardy

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