----- Ursprüngliche Nachricht -----
Von: Peter Bigot
Gesendet am: 09 Dez 2011 16:45:44

>>> _executed_ is a different thing. The instruction is fetched (and a 
>>> breakpoint
>>> on it is triggered) on every MSP.
>>> However, the instruction will be _executed_ the moment an interrupt is
>>> triggered and LMP ends. However, it will be executed before the ISR
>>> is entered, and not, as one would expect, after the ISR has ended LPM.

>> I could believe this, but please provide a reference supporting your claim.

> The claim is not supported by a test program using an MSP430G2553.
> With this sequence:
> 2c:   32 d0 f8 00     bis     #248,   r2      ;#0x00f8
> 30:   16 43           mov     #1,     r6      ;r3 As==01
> where r6 was previously zero, r6 still has the value zero within the
> interrupt handler that wakes the MCU.  This is entering LPM4; LPM0
> behaves the same.

> Have I misunderstood what you're saying?  Is there a different
> situation that you meant?

No, you got it right. The G series seems to be immune. (See my other
post). So TI did some change in the silicon. I don't know when
and where.
I only know that the code above would have exposed the problem
on the 1232 I worked on ~6 years ago. 
(interestingly, this never appeared in the 1232 errata sheet)
Since then, all my  operations on SR include a following NOP unless
the next operation is known to be not critical. So I never checked
again.
And I don't have one of the old 1232 anymore. 
However, on many MSPs (if not all), a breakpoint on the MOV would
be triggered before LPM is entered.
Maybe the LMP mechanism does discard the already fetched 
instruction then.

JMGross

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