I'm looking for advice regarding the design of a MIDI synthesizer.

In the past, I've worked with FPGAs and with dsPIC microprocessors to create successful MIDI synthesizer designs. These designs all had one thing in common: the processing consisted of code to generate a single frame (2 samples for stereo) which was presented to the DAC at each DAC interrupt. No ring buffer was used because the code was guaranteed to complete new samples generation before the DAC "need more" interrupt was received. This is possible because in both FPGA and dsPIC cases, there is no operating system (bare metal) and thus the time required to complete calculations was easy to know.

I've recently purchased a Raspberry Pi 2 which uses a 900 MHz 4 core ARMv7 processor. I've installed a Cirrus Logic - Element 14 sound board (similar to Wolfson) for high quality audio. I've also built a physical MIDI interface which connects MIDI to the console UART (with console features disabled). I've been learning about ALSA programming and have used the example program pcm.c to experiment with generating a sine audio output stream using the sine function. This is, from my viewpoint, a rudimentary synthesizer. I've also been experimenting with threads and CPU affinity as well as isolcpu to isolate cores. My assumption (which could be incorrect) is that isolated cores will run at near bare metal efficiency because the interrupts from random devices and other mundane kernel tasks will be handled by the core or cores left for the kernel's use and that the clocks of the isolated core or cores can be used to generate samples with more time deterministic properties than would be without isolated cores.

Advice regarding this endeavor would be appreciated. Questions include which of the transfer methods will come closest to my goal of low latency (from time to MIDI message receipt to sound coming out of the speakers).

-- Scott Gravenhorst
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