Hi all
Well somehow it's alive and kicking, and for good reason, lots of digital signal
processing can be done efficiently on FPGA, and it has at least one advantage, which is
that possibly the digital signal path design is more sensible (the structure is fixed,
maybe like dedicated micro processors could be) and less influenced by computer properties
like caches and unknowns (memory access latency, parallelism constructs, dynamic pipeline
issues).
Some people (I recall there are at least some here, too) also find it just fun, and
actually, which is my opinion, it deserves a place because it's also very efficient, in
many ways all computer and DSP chips seldom are: from bit-level fast responsiveness, to
pipe-lined architectures on programmable logic ("Field Programmable Gate Arrays") that
outperform heavy computers or DSP machines.
So I looked at a great tool, which I think I've mentioned here, to make use of an
accessible and readily available FPGA technology (Xilinx Zynq chips, for instance on the
$99 Parallella board I bought from Kickstarter years ago), which is the latest Vivado_hls,
the (Xilinx, I'm not affiliated with them, just like I'm not with Intel when using PC's),
a design environment which allows you to quickly (...) design a FPGA co-processor for the
Linux ARM-type processors on the same Zynq chip, FROM C CODE.
Lots of catches right there, especially bout "fast" and "easy", which is only true for
some problems and after you've done all the work, as is often the case for implementing
some processing algorithm on a (new) technology. It's fun though that in principle you can
take a C function, and turn it into a processing block on the cheap FPGA, usually running
at at least 100 MHz clock frequency. To much to go into now, but it's not overly hard to
get an example started if you're familiar with most of the concepts, I'll make a video
about that for people who like that, but now, there's that question of "why" would anyone
be interested in such technology ?
In short, there's good motivation when a little board can out-compute a PC on essential
computations, like a double (!) precision cosine computation of given good accuracy, with
a short pipeline. Personally, I also like to make things like a DAC connection and (high
speed) keyboard connection lightning fast, which isn't really easy on a PC with USB and so
on, but for the moment I just downloaded the freely available (but not Open source)
"Vivado" design environment on a Linux computer (running Fedora) and played around with
some of the examples to see what computations for musical instruments could be done with it.
I think it is insightful for interested persons to have a little impression of some of the
criteria and practical achievements involved in the latest wave of possible FPGA music
related computations (FPGAs are mainstream EE tools for decades already, probably present
in your digital mixer and synthesizers, etc.).
For basic waveforms and all kinds of other musical computations, one could use a sine wave
computation, so that's a good start to take an example from, and I found out the
following, after noting that a simple (like I said on boards of far less than $200) FPGA
can easily do serious math with an instantiated multiplier, adder, etc, with this kind of
tool including in serious floating point formats. So I made an example where I took a
double precision cosine function, connected it over a (not blazing fast) interface with
the ARM linux cores on a Zynq 7010, and could at least create an actual FPGA programming
file that could be FTP-ed to the little board from the PC running Vivado, and subsequently
(without rebooting) be loaded in the FPGA fabric. It worked accurately (closer than 10e-16
compared with double precision C computations on the Linux cores) and reliably, in
practice. I've reported this on the Parallella.org (site is down at this moment, but it
can be searched there, if you have a login), including the necessary design files to try
it yourself.
So there was an upgrade to the design env, and suddenly, it reported a lot faster
"(double) cos(double x);" function mapping to FPGA, up to a pipeline length of under 30
clock cycles and full (every clock cycle one) pipeline activity at over 100MHz, which
means a double precision cosine computation, with the accuracy of a computer per 10 nS.
that's faster than most PCs can do, so for such a humble, low power chip, that's cool.
There's a catch, though: it didn't fit in my chip. Argh.
Here's some data I gathered (this is exploring the 1st pass of the design software, actual
implementation could differ, but the design I actually tested on the chip matched ok),
without the data, because I seem to recall there's some form of "no benchmark" clause in
the use of the software, only what ideas are possible to think about when contemplating on
that "organ on a chip" or "1000 free running harmonic oscillators with per-sample control"
or "how about putting that 30-band eq in a chip" ideas
y = PI*sin(x+PI/(4.0)*exp(x);
ok, but twice too big for my chip
y = sin( fmod(x, 2*PI) ) * exp(x)
C translation stalled,
y = x * x;
no prob, pretty fast and small (remember: in *** double precision floating
point *** )
return ( exp (x) );
little more space needed, fine
I was into the highest quality wave synthesis from mathematical primitives I could achieve
quite a while ago already, like this kind of idea:
http://www.theover.org/Mypages/Mypages/Creating%20wave%20formulas%20with%20BWise.html
and all the software in that page, including links on the bottom like 2*10 array of
sine/exponent computations, runs on the Linux cores of modern ARM processors, too, so that
is an interesting combination with the FPGA acceleration option, including prototypes and
high sampling rate experiments.
Interesting is that the resources on the FPGA can be used pretty interestingly, but the
little chip has been too small with these basic C computations in double precision in just
about every dimension possible, so for later versions and general use it would be cool to
be able to chose implementations of math functions easily that trade resources for some
performance penalty...
T.
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