Hello Theo
bandwidth is indeed an interesting point.
I have done a calculation regarding the number or operations requiring
RAM access to get and store the information for pipelined filtering and
sound processing over the time slices. Summarizing all the (up to 4
reads and writes per RAM) bits over all available rams in the Artix, it
requires something around 20-50 PCs with current DDR Controllers to
perform the same number of calculations the same time.
j
Am 10.10.2017 um 16:39 schrieb Theo Verelst:
What was that about? I did chip design elements back in the 90s, what
does that have to do with making a FPGA design that at high level
verifies as interesting because it even seems to out-compute a pentium?
I've done things with both DSPs and FPGAs and it strikes me that the way
to go for intelligent algorithms can well include FPGA nowadays because
it's becoming easier to "compile to silicon".
I was reading about High Bandwidth Memory stacked on FPGA to make even
PC memory bandwidth look pale in comparison I think it's an interesting
development that can be practically experimented with already.
T.V.
_______________________________________________
dupswapdrop: music-dsp mailing list
music-dsp@music.columbia.edu
https://lists.columbia.edu/mailman/listinfo/music-dsp
_______________________________________________
dupswapdrop: music-dsp mailing list
music-dsp@music.columbia.edu
https://lists.columbia.edu/mailman/listinfo/music-dsp
