Mitch,
Those of us who have been laying out PC boards for many years have
learned (the hard way) that it's a good idea to route all inputs that
are tied to Gnd or Vcc on the bottom layer with a narrow trace, so that
it may be easily cut later when we discover that the board design had an
error.
Not that circuit designers ever make mistakes.
I can tell you how to cut a trace that's buried in layer 4 of a 12 layer
board, using a drill bit and a microscope and an ohmmeter. Because I've
had to do it.
On 6/10/15 5:21 PM, Mitch wrote:
I grounded POL following the Nixiechron schematic. Somehow dimming works
well with that clock. Hopefully the answer is not to connect POL to VCC.
Traces are under the PLCC socket.
--
David Forbes, Tucson AZ
--
You received this message because you are subscribed to the Google Groups
"neonixie-l" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to neonixie-l+unsubscr...@googlegroups.com.
To post to this group, send an email to neonixie-l@googlegroups.com.
To view this discussion on the web, visit
https://groups.google.com/d/msgid/neonixie-l/5579C17A.3080805%40dakotacom.net.
For more options, visit https://groups.google.com/d/optout.
