On Monday, May 8, 2023 at 6:14:50 PM UTC-4 gregebert wrote:

I've never been comfortable with software doing really tight-timing loops, 
especially if you need timing resolution well-below 1usec


 I had a clock from someone well-known here. It used a sw-controlled high 
voltage supply. Doing a firmware update smoked some of the components 
because it held the CPU in reset while uploading the firmware.

The last time I did timing-critical software was for a floppy-disk 
controller over 40 years ago; the Z80 CPU running at 4Mhz had 16usec to 
read and store each byte as it came out of the controller chip and the loop 
typically took 12usec. 


uPD765 and DMA controller - a winning combination. WD1771 and programmed 
IO, not so much. I built a commercial SCSI (actually SASI back then) 
interface out of some parallel ports. That was an interesting driver. 

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