Hi Sudarsana, [auto build test WARNING on net-next/master]
url: https://github.com/0day-ci/linux/commits/Sudarsana-Kalluru/qed-Add-support-for-PTP/20170129-153407 config: parisc-allyesconfig (attached as .config) compiler: hppa-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705 reproduce: wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree make.cross ARCH=parisc All warnings (new ones prefixed by >>): In file included from ./arch/parisc/include/generated/asm/div64.h:1:0, from include/linux/kernel.h:147, from arch/parisc/include/asm/bug.h:4, from include/linux/bug.h:4, from include/linux/io.h:23, from drivers/net/ethernet/qlogic/qed/qed.h:37, from drivers/net/ethernet/qlogic/qed/qed_ptp.c:33: drivers/net/ethernet/qlogic/qed/qed_ptp.c: In function 'qed_ptp_hw_adjfreq': include/asm-generic/div64.h:207:28: warning: comparison of distinct pointer types lacks a cast (void)(((typeof((n)) *)0) == ((uint64_t *)0)); \ ^ >> drivers/net/ethernet/qlogic/qed/qed_ptp.c:193:4: note: in expansion of macro >> 'do_div' do_div(period1, ppb); ^~~~~~ include/asm-generic/div64.h:207:28: warning: comparison of distinct pointer types lacks a cast (void)(((typeof((n)) *)0) == ((uint64_t *)0)); \ ^ drivers/net/ethernet/qlogic/qed/qed_ptp.c:195:4: note: in expansion of macro 'do_div' do_div(period1, 16); ^~~~~~ include/asm-generic/div64.h:207:28: warning: comparison of distinct pointer types lacks a cast (void)(((typeof((n)) *)0) == ((uint64_t *)0)); \ ^ drivers/net/ethernet/qlogic/qed/qed_ptp.c:203:4: note: in expansion of macro 'do_div' do_div(temp, (period1 * 16 + 8)); ^~~~~~ include/asm-generic/div64.h:207:28: warning: comparison of distinct pointer types lacks a cast (void)(((typeof((n)) *)0) == ((uint64_t *)0)); \ ^ drivers/net/ethernet/qlogic/qed/qed_ptp.c:209:4: note: in expansion of macro 'do_div' do_div(temp, (period2 * 16 + 8)); ^~~~~~ vim +/do_div +193 drivers/net/ethernet/qlogic/qed/qed_ptp.c 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 #include <linux/types.h> > 33 #include "qed.h" 34 #include "qed_dev_api.h" 35 #include "qed_hw.h" 36 #include "qed_l2.h" 37 #include "qed_ptp.h" 38 #include "qed_reg_addr.h" 39 40 /* 16 nano second time quantas to wait before making a Drift adjustment */ 41 #define QED_DRIFT_CNTR_TIME_QUANTA_SHIFT 0 42 /* Nano seconds to add/subtract when making a Drift adjustment */ 43 #define QED_DRIFT_CNTR_ADJUSTMENT_SHIFT 28 44 /* Add/subtract the Adjustment_Value when making a Drift adjustment */ 45 #define QED_DRIFT_CNTR_DIRECTION_SHIFT 31 46 #define QED_TIMESTAMP_MASK BIT(16) 47 48 /* Read Rx timestamp */ 49 static int qed_ptp_hw_read_rx_ts(struct qed_dev *cdev, u64 *timestamp) 50 { 51 struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev); 52 struct qed_ptt *p_ptt = p_hwfn->p_ptp_ptt; 53 u32 val; 54 55 *timestamp = 0; 56 val = qed_rd(p_hwfn, p_ptt, NIG_REG_LLH_PTP_HOST_BUF_SEQID); 57 if (!(val & QED_TIMESTAMP_MASK)) { 58 DP_INFO(p_hwfn, "Invalid Rx timestamp, buf_seqid = %d\n", val); 59 return -EINVAL; 60 } 61 62 val = qed_rd(p_hwfn, p_ptt, NIG_REG_LLH_PTP_HOST_BUF_TS_LSB); 63 *timestamp = qed_rd(p_hwfn, p_ptt, NIG_REG_LLH_PTP_HOST_BUF_TS_MSB); 64 *timestamp <<= 32; 65 *timestamp |= val; 66 67 /* Reset timestamp register to allow new timestamp */ 68 qed_wr(p_hwfn, p_ptt, NIG_REG_LLH_PTP_HOST_BUF_SEQID, 69 QED_TIMESTAMP_MASK); 70 71 return 0; 72 } 73 74 /* Read Tx timestamp */ 75 static int qed_ptp_hw_read_tx_ts(struct qed_dev *cdev, u64 *timestamp) 76 { 77 struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev); 78 struct qed_ptt *p_ptt = p_hwfn->p_ptp_ptt; 79 u32 val; 80 81 *timestamp = 0; 82 val = qed_rd(p_hwfn, p_ptt, NIG_REG_TX_LLH_PTP_BUF_SEQID); 83 if (!(val & QED_TIMESTAMP_MASK)) { 84 DP_INFO(p_hwfn, "Invalid Tx timestamp, buf_seqid = %d\n", val); 85 return -EINVAL; 86 } 87 88 val = qed_rd(p_hwfn, p_ptt, NIG_REG_TX_LLH_PTP_BUF_TS_LSB); 89 *timestamp = qed_rd(p_hwfn, p_ptt, NIG_REG_TX_LLH_PTP_BUF_TS_MSB); 90 *timestamp <<= 32; 91 *timestamp |= val; 92 93 /* Reset timestamp register to allow new timestamp */ 94 qed_wr(p_hwfn, p_ptt, NIG_REG_TX_LLH_PTP_BUF_SEQID, QED_TIMESTAMP_MASK); 95 96 return 0; 97 } 98 99 /* Read Phy Hardware Clock */ 100 static int qed_ptp_hw_read_cc(struct qed_dev *cdev, u64 *phc_cycles) 101 { 102 struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev); 103 struct qed_ptt *p_ptt = p_hwfn->p_ptp_ptt; 104 u32 temp = 0; 105 106 temp = qed_rd(p_hwfn, p_ptt, NIG_REG_TSGEN_SYNC_TIME_LSB); 107 *phc_cycles = qed_rd(p_hwfn, p_ptt, NIG_REG_TSGEN_SYNC_TIME_MSB); 108 *phc_cycles <<= 32; 109 *phc_cycles |= temp; 110 111 return 0; 112 } 113 114 /* Filter PTP protocol packets that need to be timestamped */ 115 static int qed_ptp_hw_cfg_rx_filters(struct qed_dev *cdev, 116 enum qed_ptp_filter_type type) 117 { 118 struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev); 119 struct qed_ptt *p_ptt = p_hwfn->p_ptp_ptt; 120 u32 rule_mask, parm_mask; 121 122 switch (type) { 123 case QED_PTP_FILTER_L2_IPV4_IPV6: 124 parm_mask = 0x6AA; 125 rule_mask = 0x3EEE; 126 break; 127 case QED_PTP_FILTER_L2: 128 parm_mask = 0x6BF; 129 rule_mask = 0x3EFF; 130 break; 131 case QED_PTP_FILTER_IPV4_IPV6: 132 parm_mask = 0x7EA; 133 rule_mask = 0x3FFE; 134 break; 135 case QED_PTP_FILTER_IPV4: 136 parm_mask = 0x7EE; 137 rule_mask = 0x3FFE; 138 break; 139 default: 140 DP_INFO(p_hwfn, "Invalid PTP filter type %d\n", type); 141 return -EINVAL; 142 } 143 144 qed_wr(p_hwfn, p_ptt, NIG_REG_LLH_PTP_PARAM_MASK, parm_mask); 145 qed_wr(p_hwfn, p_ptt, NIG_REG_LLH_PTP_RULE_MASK, rule_mask); 146 147 qed_wr(p_hwfn, p_ptt, NIG_REG_LLH_PTP_TO_HOST, 0x1); 148 149 /* Reset possibly old timestamps */ 150 qed_wr(p_hwfn, p_ptt, NIG_REG_LLH_PTP_HOST_BUF_SEQID, 151 QED_TIMESTAMP_MASK); 152 153 return 0; 154 } 155 156 /* Adjust the HW clock by a rate given in parts-per-million (ppm) units. 157 * FW/HW accepts the adjustment value in terms of 3 parameters: 158 * Drift period - adjustment happens once in certain number of nano seconds. 159 * Drift value - time is adjusted by a certain value, for example by 5 ns. 160 * Drift direction - add or subtract the adjustment value. 161 * The routine translates ppm into the adjustment triplet in an optimal manner. 162 */ 163 static int qed_ptp_hw_adjfreq(struct qed_dev *cdev, s32 ppb) 164 { 165 struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev); 166 s64 period, period1, period2, dif, dif1, dif2; 167 struct qed_ptt *p_ptt = p_hwfn->p_ptp_ptt; 168 int drift_dir, best_val, best_period; 169 s64 best_dif, temp, val; 170 u32 drift_ctr_cfg = 0; 171 u32 drift_state; 172 173 best_dif = 1000000000; 174 best_period = 1; 175 best_val = 0; 176 drift_dir = 1; 177 178 if (ppb < 0) { 179 ppb = -ppb; 180 drift_dir = 0; 181 } 182 183 if (ppb == 0) { 184 /* No clock adjustment required */ 185 best_val = 0; 186 best_period = 0xFFFFFFF; 187 } else { 188 /* Adjustment value is up to +/-7ns, find an optimal value in 189 * this range. 190 */ 191 for (val = 0; val <= 7; val++) { 192 period1 = val * 1000000000; > 193 do_div(period1, ppb); 194 period1 -= 8; 195 do_div(period1, 16); 196 if (period1 < 1) --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
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