Am 2021-02-13 01:18, schrieb Russell King - ARM Linux admin:
On Fri, Feb 12, 2021 at 11:40:59PM +0100, Michael Walle wrote:
Fun fact, now it may be the other way around. If the bootloader
doesn't
configure it and the PHY isn't reset by the hardware, it won't work in
the bootloader after a reboot ;)
If we start messing around with the configuration of PHYs in that
regard, we could be opening ourselves up for a world of pain...
If you disable aneg between MAC and PHY, what would be the actual
speed
setting/duplex mode then? I guess it have to match the external speed?
That is a function of the interface mode and the PHY capabilities.
1) if the PHY supports rate adaption, and is programmed for that, then
the PHY link normally operates at a fixed speed (e.g. 1G for SGMII)
and the PHY converts to the appropriate speed.
We don't actually support this per se, since the parameters we give
to the MAC via mac_link_up() are the media side parameters, not the
link parameters.
2) if the PHY does not support rate adaption, then the MAC to PHY link
needs to follow the media speed and duplex. phylink will be in "PHY"
mode, where it passes the media side negotiation results to the MAC
just like phylib would, and the MAC should be programmed
appropriately. In the case of a SGMII link, the link needs to be
programmed to do the appropriate symbol repetition for 100M and 10M
speeds. The PHY /should/ do that automatically, but if it doesn't,
then the PHY also needs to be programmed to conform. (since if
there's no rate adaption in the PHY, the MAC side and the media side
must match.)
Thanks, but I'm not sure I understand the difference between "rate
adaption" and symbol repetition. The SGMII link is always 1.25Gb,
right? If the media side is 100Mbit it will repeat the symbol 10
times or 100 times in case of 10Mbit. What is "rate adaption" then?
--
-michael
