Hopper, Blackwell and later require more space for the non-WPR heap. Add a new FbHal method to return the non-WPR heap size, and create a new GH100 HAL for Hopper and GB100 HAL for Blackwell that return the appropriate value for each GPU architecture.
Cc: Timur Tabi <[email protected]> Signed-off-by: John Hubbard <[email protected]> --- drivers/gpu/nova-core/fb.rs | 14 +++++++--- drivers/gpu/nova-core/fb/hal.rs | 7 +++-- drivers/gpu/nova-core/fb/hal/ga102.rs | 2 +- drivers/gpu/nova-core/fb/hal/gb100.rs | 37 +++++++++++++++++++++++++++ drivers/gpu/nova-core/fb/hal/gh100.rs | 37 +++++++++++++++++++++++++++ 5 files changed, 91 insertions(+), 6 deletions(-) create mode 100644 drivers/gpu/nova-core/fb/hal/gb100.rs create mode 100644 drivers/gpu/nova-core/fb/hal/gh100.rs diff --git a/drivers/gpu/nova-core/fb.rs b/drivers/gpu/nova-core/fb.rs index 3a2b79a5c107..7c502f15622c 100644 --- a/drivers/gpu/nova-core/fb.rs +++ b/drivers/gpu/nova-core/fb.rs @@ -98,6 +98,15 @@ pub(crate) fn unregister(&self, bar: &Bar0) { } } +/// Calculate non-WPR heap size based on chipset architecture. +/// This matches the logic used in FSP for consistency. +pub(crate) fn calc_non_wpr_heap_size(chipset: Chipset) -> u64 { + hal::fb_hal(chipset) + .non_wpr_heap_size() + .map(u64::from) + .unwrap_or(SZ_1M as u64) +} + pub(crate) struct FbRange(Range<u64>); impl FbRange { @@ -255,9 +264,8 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_fw: &GspFirmware) -> Result< }; let heap = { - const HEAP_SIZE: u64 = usize_as_u64(SZ_1M); - - FbRange(wpr2.start - HEAP_SIZE..wpr2.start) + let heap_size = calc_non_wpr_heap_size(chipset); + FbRange(wpr2.start - heap_size..wpr2.start) }; // Calculate reserved sizes. PMU reservation is a subset of the total reserved size. diff --git a/drivers/gpu/nova-core/fb/hal.rs b/drivers/gpu/nova-core/fb/hal.rs index eaa545fe9b08..ebd12247f771 100644 --- a/drivers/gpu/nova-core/fb/hal.rs +++ b/drivers/gpu/nova-core/fb/hal.rs @@ -12,6 +12,8 @@ mod ga100; mod ga102; +mod gb100; +mod gh100; mod tu102; pub(crate) trait FbHal { @@ -42,7 +44,8 @@ pub(crate) fn fb_hal(chipset: Chipset) -> &'static dyn FbHal { match chipset.arch() { Architecture::Turing => tu102::TU102_HAL, Architecture::Ampere if chipset == Chipset::GA100 => ga100::GA100_HAL, - Architecture::Ampere => ga102::GA102_HAL, - Architecture::Hopper | Architecture::Ada | Architecture::Blackwell => ga102::GA102_HAL, + Architecture::Ampere | Architecture::Ada => ga102::GA102_HAL, + Architecture::Hopper => gh100::GH100_HAL, + Architecture::Blackwell => gb100::GB100_HAL, } } diff --git a/drivers/gpu/nova-core/fb/hal/ga102.rs b/drivers/gpu/nova-core/fb/hal/ga102.rs index 734605905031..f8d8f01e3c5d 100644 --- a/drivers/gpu/nova-core/fb/hal/ga102.rs +++ b/drivers/gpu/nova-core/fb/hal/ga102.rs @@ -8,7 +8,7 @@ regs, // }; -fn vidmem_size_ga102(bar: &Bar0) -> u64 { +pub(super) fn vidmem_size_ga102(bar: &Bar0) -> u64 { regs::NV_USABLE_FB_SIZE_IN_MB::read(bar).usable_fb_size() } diff --git a/drivers/gpu/nova-core/fb/hal/gb100.rs b/drivers/gpu/nova-core/fb/hal/gb100.rs new file mode 100644 index 000000000000..eaab3f934f6e --- /dev/null +++ b/drivers/gpu/nova-core/fb/hal/gb100.rs @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: GPL-2.0 + +use kernel::prelude::*; + +use crate::{ + driver::Bar0, + fb::hal::FbHal, // +}; + +struct Gb100; + +impl FbHal for Gb100 { + fn read_sysmem_flush_page(&self, bar: &Bar0) -> u64 { + super::ga100::read_sysmem_flush_page_ga100(bar) + } + + fn write_sysmem_flush_page(&self, bar: &Bar0, addr: u64) -> Result { + super::ga100::write_sysmem_flush_page_ga100(bar, addr); + + Ok(()) + } + + fn supports_display(&self, bar: &Bar0) -> bool { + super::ga100::display_enabled_ga100(bar) + } + + fn vidmem_size(&self, bar: &Bar0) -> u64 { + super::ga102::vidmem_size_ga102(bar) + } + + fn non_wpr_heap_size(&self) -> Option<u32> { + Some(0x220000) + } +} + +const GB100: Gb100 = Gb100; +pub(super) const GB100_HAL: &dyn FbHal = &GB100; diff --git a/drivers/gpu/nova-core/fb/hal/gh100.rs b/drivers/gpu/nova-core/fb/hal/gh100.rs new file mode 100644 index 000000000000..6c56b8439276 --- /dev/null +++ b/drivers/gpu/nova-core/fb/hal/gh100.rs @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: GPL-2.0 + +use kernel::prelude::*; + +use crate::{ + driver::Bar0, + fb::hal::FbHal, // +}; + +struct Gh100; + +impl FbHal for Gh100 { + fn read_sysmem_flush_page(&self, bar: &Bar0) -> u64 { + super::ga100::read_sysmem_flush_page_ga100(bar) + } + + fn write_sysmem_flush_page(&self, bar: &Bar0, addr: u64) -> Result { + super::ga100::write_sysmem_flush_page_ga100(bar, addr); + + Ok(()) + } + + fn supports_display(&self, bar: &Bar0) -> bool { + super::ga100::display_enabled_ga100(bar) + } + + fn vidmem_size(&self, bar: &Bar0) -> u64 { + super::ga102::vidmem_size_ga102(bar) + } + + fn non_wpr_heap_size(&self) -> Option<u32> { + Some(0x200000) + } +} + +const GH100: Gh100 = Gh100; +pub(super) const GH100_HAL: &dyn FbHal = &GH100; -- 2.52.0
