Dan Williams wrote:
> Robert Richter wrote:
> > On 01.12.22 13:34:05, Dan Williams wrote:
> > > From: Robert Richter <[email protected]>
> > >
> > > A downstream port must be connected to a component register block.
> > > For restricted hosts the base address is determined from the RCRB. The
> > > RCRB is provided by the host's CEDT CHBS entry. Rework CEDT parser to
> > > get the RCRB and add code to extract the component register block from
> > > it.
> > >
> > > RCRB's BAR[0..1] point to the component block containing CXL subsystem
> > > component registers. MEMBAR extraction follows the PCI base spec here,
> > > esp. 64 bit extraction and memory range alignment (6.0, 7.5.1.2.1). The
> > > RCRB base address is cached in the cxl_dport per-host bridge so that the
> > > upstream port component registers can be retrieved later by an RCD
> > > (RCIEP) associated with the host bridge.
> > >
> > > Note: Right now the component register block is used for HDM decoder
> > > capability only which is optional for RCDs. If unsupported by the RCD,
> > > the HDM init will fail. It is future work to bypass it in this case.
> > >
> > > Co-developed-by: Terry Bowman <[email protected]>
> > > Signed-off-by: Terry Bowman <[email protected]>
> > > Signed-off-by: Robert Richter <[email protected]>
> > > Link: https://lore.kernel.org/r/[email protected]
> > > [djbw: introduce devm_cxl_add_rch_dport()]
> > > Signed-off-by: Dan Williams <[email protected]>
> >
> > Found an issue below. Patch looks good to me otherwise.
> >
> > > ---
> > > drivers/cxl/acpi.c | 51 ++++++++++++++++++++++++++++-----
> > > drivers/cxl/core/port.c | 53 ++++++++++++++++++++++++++++++----
> > > drivers/cxl/core/regs.c | 64
> > > +++++++++++++++++++++++++++++++++++++++++
> > > drivers/cxl/cxl.h | 16 ++++++++++
> > > tools/testing/cxl/Kbuild | 1 +
> > > tools/testing/cxl/test/cxl.c | 10 ++++++
> > > tools/testing/cxl/test/mock.c | 19 ++++++++++++
> > > tools/testing/cxl/test/mock.h | 3 ++
> > > 8 files changed, 203 insertions(+), 14 deletions(-)
> > >
> > > diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
> >
> > > @@ -274,21 +301,29 @@ static int add_host_bridge_dport(struct device
> > > *match, void *arg)
> > > dev_dbg(match, "UID found: %lld\n", uid);
> > >
> > > ctx = (struct cxl_chbs_context) {
> > > - .dev = host,
> > > + .dev = match,
> > > .uid = uid,
> > > };
> > > acpi_table_parse_cedt(ACPI_CEDT_TYPE_CHBS, cxl_get_chbcr, &ctx);
> > >
> > > - if (ctx.chbcr == 0) {
> > > + if (ctx.rcrb != CXL_RESOURCE_NONE)
> > > + dev_dbg(match, "RCRB found for UID %lld: %pa\n", uid,
> > > &ctx.rcrb);
> > > +
> > > + if (ctx.chbcr == CXL_RESOURCE_NONE) {
> > > dev_warn(match, "No CHBS found for Host Bridge (UID %lld)\n",
> > > uid);
> > > return 0;
> > > }
> >
> > The logic must be changed to handle the case where the chbs entry is
> > missing:
> >
> > if (!ctx.chbcr) {
> > dev_warn(match, "No CHBS found for Host Bridge (UID %lld)\n",
> > uid);
> > return 0;
> > }
>
> Noted, and folded into the patch.
Oh, this also means that the mock version needs to return non-zero.
Folded this change as well:
@@ -702,7 +702,7 @@ resource_size_t mock_cxl_rcrb_to_component(struct device
*dev,
{
dev_dbg(dev, "rcrb: %pa which: %d\n", &rcrb, which);
- return 0;
+ return (resource_size_t) which + 1;
}
static struct cxl_mock_ops cxl_mock_ops = {
The component registers are never used when talking to mock devices.
