Robert Richter wrote:
> On 02.12.22 23:04:49, Dan Williams wrote:
> > Robert Richter wrote:
> > > On 01.12.22 13:34:05, Dan Williams wrote:
> > > > From: Robert Richter <[email protected]>
> > > > 
> > > > A downstream port must be connected to a component register block.
> > > > For restricted hosts the base address is determined from the RCRB. The
> > > > RCRB is provided by the host's CEDT CHBS entry. Rework CEDT parser to
> > > > get the RCRB and add code to extract the component register block from
> > > > it.
> > > > 
> > > > RCRB's BAR[0..1] point to the component block containing CXL subsystem
> > > > component registers. MEMBAR extraction follows the PCI base spec here,
> > > > esp. 64 bit extraction and memory range alignment (6.0, 7.5.1.2.1). The
> > > > RCRB base address is cached in the cxl_dport per-host bridge so that the
> > > > upstream port component registers can be retrieved later by an RCD
> > > > (RCIEP) associated with the host bridge.
> > > > 
> > > > Note: Right now the component register block is used for HDM decoder
> > > > capability only which is optional for RCDs. If unsupported by the RCD,
> > > > the HDM init will fail. It is future work to bypass it in this case.
> > > > 
> > > > Co-developed-by: Terry Bowman <[email protected]>
> > > > Signed-off-by: Terry Bowman <[email protected]>
> > > > Signed-off-by: Robert Richter <[email protected]>
> > > > Link: https://lore.kernel.org/r/[email protected]
> > > > [djbw: introduce devm_cxl_add_rch_dport()]
> > > > Signed-off-by: Dan Williams <[email protected]>
> > > 
> > > Found an issue below. Patch looks good to me otherwise.
> > > 
> > > > ---
> > > >  drivers/cxl/acpi.c            |   51 ++++++++++++++++++++++++++++-----
> > > >  drivers/cxl/core/port.c       |   53 ++++++++++++++++++++++++++++++----
> > > >  drivers/cxl/core/regs.c       |   64 
> > > > +++++++++++++++++++++++++++++++++++++++++
> > > >  drivers/cxl/cxl.h             |   16 ++++++++++
> > > >  tools/testing/cxl/Kbuild      |    1 +
> > > >  tools/testing/cxl/test/cxl.c  |   10 ++++++
> > > >  tools/testing/cxl/test/mock.c |   19 ++++++++++++
> > > >  tools/testing/cxl/test/mock.h |    3 ++
> > > >  8 files changed, 203 insertions(+), 14 deletions(-)
> > > > 
> > > > diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
> > > 
> > > > @@ -274,21 +301,29 @@ static int add_host_bridge_dport(struct device 
> > > > *match, void *arg)
> > > >         dev_dbg(match, "UID found: %lld\n", uid);
> > > >  
> > > >         ctx = (struct cxl_chbs_context) {
> > > > -               .dev = host,
> > > > +               .dev = match,
> > > >                 .uid = uid,
> > > >         };
> > > >         acpi_table_parse_cedt(ACPI_CEDT_TYPE_CHBS, cxl_get_chbcr, &ctx);
> > > >  
> > > > -       if (ctx.chbcr == 0) {
> > > > +       if (ctx.rcrb != CXL_RESOURCE_NONE)
> > > > +               dev_dbg(match, "RCRB found for UID %lld: %pa\n", uid, 
> > > > &ctx.rcrb);
> > > > +
> > > > +       if (ctx.chbcr == CXL_RESOURCE_NONE) {
> > > >                 dev_warn(match, "No CHBS found for Host Bridge (UID 
> > > > %lld)\n", uid);
> > > >                 return 0;
> > > >         }
> > > 
> > > The logic must be changed to handle the case where the chbs entry is
> > > missing:
> > > 
> > >   if (!ctx.chbcr) {
> > >           dev_warn(match, "No CHBS found for Host Bridge (UID %lld)\n", 
> > > uid);
> > >           return 0;
> > >   }
> > 
> > Noted, and folded into the patch.
> 
> In the (ctx.chbcr == CXL_RESOURCE_NONE) case there is a slighly
> different error reason. The CHBS was found but the CHBCR was invalid
> or something else failed to determine it. That's why a different
> message should be reported, e.g.:
> 
>       dev_warn(match, "CHBCR invalid for Host Bridge (UID %lld)\n", uid);
> 
> (Note I originally used "missing", but "invalid" is more reasonable
> as there is something but it's not correct.)
> 

Care to send a patch on top of cxl/next to fix this up?

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