On Apr 10, 2005 9:40 PM, Daniel Phillips <[EMAIL PROTECTED]> wrote:
> On Sunday 10 April 2005 20:44, Timothy Miller wrote:
> > What you get, when you buy the prototype board, is the same logic as
> > what you get from the consumer board, except that it's slower and
> > more expensive.  Mind you, there'll probably be plenty of hobbyist
> > things you can do with either the OGP logic on it, as well as your
> > own.
> 
> I completely grok the "more expensive" part.  However, I will stick to
> my guns on the point that if it is not _too much_ more expensive, we
> will be wildly successful.  Whereas if it is _really_ expensive, well,
> I have my doubts about the "wildly" part.

The prototype board doesn't need to be wildly successful.  That is not
its purpose.  Its purpose is to be a testing platform for the ASIC. 
However, since we have to produce it anyway, we might as well sell it
as a product.  It's also a good thing to show to investors who want to
see a prototype.  If there's a good opportunity to redesign it later
to make it less expensive, then we will consider that, but that isn't
in the plan, and it very well should not be.

> 
> I'm doing a little research on 3S parts availability and prices, for my
> own edification.  This isn't 100% for sure yet, but it looks like the
> 3S4000 is several times as expensive as the 3S2000.  Unless Xilinx is
> willing to make an attractive offer, I would advocate going with the
> 3S2000.  Besides, the 3S4000 will generate a lot more heat.

We're going to TRY to fit it into the 2000, but if we cannot, we will
go with the 4000, because we now have the luxury of saving some time
by just letting the design be bigger.  The primary objective is to
produce an ASIC for the embedded and open source workstation markets
that is affordable and which has open source drivers.  The FPGA board
is nothing more than an elaborate simulation and testing environment
so that we can do a much better job of debugging before we sink $1
million into ASIC NRE.

However, there's nothing stopping us from slapping a 2000 on the board
(same package as the 4000) and selling it to you, even if you can't
fit the OGP design into it.  Well, except volumes.  But then again,
we're expecting low volumes anyhow, which is the primary reason why
this board will be so awfully expensive.

PCB's aren't all that expensive.  There isn't much to strip off the
prototype, but putting on a smaller FPGA would help, and if we get
volume orders, that'll reduce the price too.  Universities ordering
lab-fulls of these things will get a good deal.

Oh, and believe me, I've always wanted to have something like this
prototype board to play with.  When I've come up with weirdo designs,
I've had to make due with what was on our medical products.  One time,
just on a lark, I coded up an ASCII dumb terminal, with font and
everything, and stuck it into the video post-processing FPGA on one of
the medical cards.  Some people were also amused by my flashing "TIM
RULZ" overlays I inserted into the pixel processing pipeline.  Also,
some time, I'm going to need a place to run the CPU design I've been
working on.  I've borrowed a number of ideas from Alpha, Itanium, and
a number of other RISC designs.  I figured when I finished it, I'd
release the RTL to the design under GPL.

> The probability of getting free Linux tools from Xilinx is higher with
> the smaller part, for some reason nigh beyond comprehension.

The WebPack doesn't support all parts.  Xilinx already has Linux
tools.  All we need is a Linux version of the WebPack.  They seem to
have decided that they must differentiate the WebPack version from the
commercial version in some way, and the primary way seems to be to
limit the supported devices.
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