Hi Josh,
The basic idea is to simply "connect the workers".
There are two ways to do this:
1. Via the control API (create workers, get their ports, and connect them).
An example is the canny example, although it has a bunch of OpenCV stuff
that is not relevant.
(See the control API document).
2. Via the (recently finally added) XML technique of creating an XML
description of the application and its connections.
An example is bias_xml (biasFile.cxx). Where you could assign the bias
worker (selection set to "model == hdl").
(Unfortunately this technique is only shown in the various "*_xml"
examples, and not documented yet.
Probably a this point the xml technique is simplest.
Both the XML and Control API are agnostic to the type of worker.
The testRpl program is used to do this too, although it is a somewhat
contorted example.
There is some glitch that currently prevents the "bias_xml" from working
with the "bias" worker assigned to an FPGA.
We'll be looking at that shortly.
Cheers,
Jim
On 1/12/12 9:08 PM, Sutton, Joshua (Contractor) wrote:
*UNCLASSIFIED*
Hi,
Is there an example of how to interface rcc worker(s) with FPGA
worker(s) via the PCI interface?
Looking to do the typical signal flow chain - ie:
ADC-> FPGA_WORKER -> PCI_BUS -> RCC_WORKER -> FILE I/O -> RCC_WORKER
-> PCI_BUS -> FPGA_WORKER -> DAC
Cheers,
Josh
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