On Mon, 19 Mar 2018, Richard Henderson wrote:
On 03/20/2018 07:24 AM, Victor Kamensky wrote:
target/arm/translate-a64.c:handle_sys() is setting
s->base.is_jmp = DISAS_UPDATE;
which it thinks will end the TB, specifically because system
register writes might do things like unmask interrupts or
otherwise require main loop processing.
The changes that prompted b29fd33db578dec stopped this working.
I suspect what we want is for the case DISAS_UPDATE in
aarch64_tr_tb_stop() to fall through into DISAS_EXIT, not
DISAS_JUMP. (The AArch32 code gets this right, amazingly.)
Peter, thank you. I can confirm that change you suggested
like one below, boots fine.
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 625ef2d..c381091 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11384,12 +11384,12 @@ static void aarch64_tr_tb_stop(DisasContextBase
*dcbase, CPUState *cpu)
case DISAS_UPDATE:
gen_a64_set_pc_im(dc->pc);
/* fall through */
- case DISAS_JUMP:
- tcg_gen_lookup_and_goto_ptr();
- break;
case DISAS_EXIT:
tcg_gen_exit_tb(0);
break;
+ case DISAS_JUMP:
+ tcg_gen_lookup_and_goto_ptr();
+ break;
case DISAS_NORETURN:
case DISAS_SWI:
break;
Alex and I just had a long chat about this, and I think this is the right
solution.
(1) It brings aa64 into alignment with aa32 wrt the meaning of these
enumerators, (2) The only use of DISAS_UPDATE is there in handle_sys, so we're
not changing the behaviour of any other insns, (3) The most frequent writes to
system registers -- NZCV and FPCR -- are already special cased so that they
won't exit the TB.
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Thanks, Richard. So how do we go about committing it in qemu tree?
Should I submit the patch or Alex or Peter will do it?
Once fix is in qemu tree I will pick it and submit patch for OE tree
on top of current qemu-2.11.1.
Thanks,
Victor
r~
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