Tom> In working with the Intel compilers recently, however, I've
Tom> found that this compiler attempts to align data structures on
Tom> boundaries that are native to the data types. So uint64_t's
Tom> are aligned on a 64b boundary. This is an issue for
Tom> ibv_recv_wr and ibv_send_wr because they are immediately
Tom> preceded by a *next ptr which is 32b on 32b architectures.
Ugh.
How about swapping wr_id and next in the ibv_recv_wr and ibv_send_wr
structures? I hate adding __attribute__((packed)) because it ruins
things on ia64 et al.
- R.
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