On Tue, 2006-09-12 at 13:26 -0700, Roland Dreier wrote: > Tom> In working with the Intel compilers recently, however, I've > Tom> found that this compiler attempts to align data structures on > Tom> boundaries that are native to the data types. So uint64_t's > Tom> are aligned on a 64b boundary. This is an issue for > Tom> ibv_recv_wr and ibv_send_wr because they are immediately > Tom> preceded by a *next ptr which is 32b on 32b architectures. > > Ugh. > > How about swapping wr_id and next in the ibv_recv_wr and ibv_send_wr > structures? I hate adding __attribute__((packed)) because it ruins > things on ia64 et al. >
I think that just moves the alignment issue to the first word of the sge since it's first element is a uint64_t. I think the only thing that works across the board without packing is to #if __BITS_IN_WORD==32 add a pad word after *next. erf...ugly code. > - R. _______________________________________________ openib-general mailing list [email protected] http://openib.org/mailman/listinfo/openib-general To unsubscribe, please visit http://openib.org/mailman/listinfo/openib-general
