This is an automated email from Gerrit. Aurelien Jacobs (au...@gnuage.org) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/173
-- gerrit commit 02a43f3a0f8865bda9bbd5a4796626accfb0dad0 Author: Aurelien Jacobs <au...@gnuage.org> Date: Mon Oct 17 15:19:24 2011 +0200 at91sam7: add a new target config file for at91sam7x512 The main difference with at91sam7x256 is the declaration of the second bank of flash. Change-Id: I87a20dcbb639b797799139ccf46cc73934fa3b9e Signed-off-by: Aurelien Jacobs <au...@gnuage.org> diff --git a/tcl/target/at91sam7x512.cfg b/tcl/target/at91sam7x512.cfg new file mode 100644 index 0000000..0d13a96 --- /dev/null +++ b/tcl/target/at91sam7x512.cfg @@ -0,0 +1,51 @@ +#use combined on interfaces or targets that can't set TRST/SRST separately +reset_config srst_only srst_pulls_trst + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME sam7x512 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x3f0f0f0f +} + +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi + +$_TARGETNAME configure -event reset-init { + # disable watchdog + mww 0xfffffd44 0x00008000 + # enable user reset + mww 0xfffffd08 0xa5000001 + # CKGR_MOR : enable the main oscillator + mww 0xfffffc20 0x00000601 + sleep 10 + # CKGR_PLLR: 96.1097 MHz + mww 0xfffffc2c 0x00481c0e + sleep 10 + # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz + mww 0xfffffc30 0x00000007 + sleep 10 + # MC_FMR: flash mode (FWS=1,FMCN=60) + mww 0xffffff60 0x003c0100 + sleep 100 +} + +$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0 + +#flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>] +set _FLASHNAME $_CHIPNAME.flash +flash bank $_FLASHNAME.0 at91sam7 0 0 0 0 $_TARGETNAME 0 0 0 0 0 0 0 18432 +flash bank $_FLASHNAME.1 at91sam7 0 0 0 0 $_TARGETNAME 1 0 0 0 0 0 0 18432 -- ------------------------------------------------------------------------------ RSA(R) Conference 2012 Save $700 by Nov 18 Register now http://p.sf.net/sfu/rsa-sfdev2dev1 _______________________________________________ Openocd-devel mailing list Openocd-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel