Dears,

I have been working on OpenOCD support for the bcm3349 chipset, found in the 
motorola sb5101 cable modem. I want to be able to use it to flash different 
firmware to the device. I have succesfully managed to detect the bcm3349 
chipset type using a bus pirate as programmer, but up til now the flash memory 
is not detected correctly.

    > scan_chain
       TapName             Enabled  IdCode     Expected   IrLen IrCap IrMask
    -- ------------------- -------- ---------- ---------- ----- ----- ------
     0 bcm3349.cpu            Y     0x0334917f 0x0334917f     5 0x01  0x03

The flash chip is an Intel TE28F160 that, according to the datasheet ( 
http://pdf.chinaicmart.com/88889/44107.pdf ), supports CFI. I found the flash 
start address in the config file of Tom's Jtag Utility, which is commonly used 
to flash this modem. The size of the chip is 8MB (check 
http://www.mail-archive.com/openocd-development@lists.berlios.de/msg04173/jtagkey.cfg
 config file where this chip is used), which I declared it as follows


    flash bank cfi 0x9fc00000 0x200000 2 2 0


When executing flash probe 0, I get the following error (read abort).

    Flash Manufacturer/Device: 0x00ff 0x00ff
    Could not probe bank: no QRY
    Try workaround w/0x555 instead of 0x55 to get QRY.
    Could not probe bank: no QRY
    auto_probe failed
    in procedure 'flash'


When analyszing the logs, I found that openOCD is using the prAcc access method 
to read and write. Other flash utilities read and write to the flash memory 
with DMA, for which support was implemented in openOCD a while ago. DMA should 
be triggered according to the present IMPCODE of the board, which is 00800904 
in this case (which means ejtag 1 or 2 according to the code). For some reason, 
it seems that the impcode is not detected correctly, which makes the code fall 
back to the prAcc access method.

Also, I can't find any clue in the debug messages on the IMPCODE detection.

   * Does anybody have an idea how I can trigger DMA access to the flash 
memory? Is there a configuration option I can add in the attached cfg to enable 
it? Currently I am using mips_m4k as a target. I searched the documentation 
extensively but coiuldn't find anything else relevant.
   * How can I trigger the reset-init procedure by default when calling using 
the attached cfg file?


In attachment you can find the config file (might not be compliant yet with 
openOCD standards) and the config file I used as reference to port it.

Thanks,

Jeroen.                                           
# Work-area is a space in RAM used for flash programming
# By default use 16kB
if { [info exists WORKAREASIZE] } {
   set  _WORKAREASIZE $WORKAREASIZE
} else {
   set  _WORKAREASIZE 0x800000
}

# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 
1MHz
adapter_khz 1000

adapter_nsrst_delay 100
jtag_ntrst_delay 100

#jtag scan chain
if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x0334917f
}
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id $_CPUTAPID

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position 
$_TARGETNAME

$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 
$_WORKAREASIZE -work-area-backup 0

$_TARGETNAME configure -event reset-init {
  halt
  echo "Disabling watch dog.."
  $_TARGETNAME mww 0xfffe0224 0
  echo "Initializing chipset.."
  $_TARGETNAME mww 0xfffe2300 0x1a
  $_TARGETNAME mww 0xfffe2304 0
  $_TARGETNAME mww 0xfffe2308 0x8040
  $_TARGETNAME mww 0xfffe230C 3
  $_TARGETNAME mww 0xfffe2310 0x4824
}

# flash size will be probed
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x9fc00000 0x200000 2 2 0

init
//Definition for Motorola SB5001

#Boot loader
MemoryTab=Boot,0x9fc00000,0x8000

#configuration
MemoryTab=cfg,0x9fc08000,0x8000

#first copy of firmware
MemoryTab=Image0,0x9fc10000,0xf0000

#second copy of firmware
MemoryTab=Image1,0x9fd00000,0xf0000

#log data
MemoryTab=log,0x9fdf0000,0x10000

/*

// watch dog
Init=0xfffe0224,0
// initialize chip set
Init=0xfffe2300,0x1a
Init=0xfffe2304,0
Init=0xfffe2308,0x8040
Init=0xfffe230C,3
Init=0xfffe2310,0x4824

*/
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