This is an automated email from Gerrit.

Spencer Oliver ([email protected]) just uploaded a new patch set to Gerrit, 
which you can find at http://openocd.zylin.com/607

-- gerrit

commit 66ba3cc42f505343b57422802784b903bcab7dec
Author: Spencer Oliver <[email protected]>
Date:   Tue May 1 13:26:01 2012 +0100

    stlink: support connecting under reset
    
    Some targets support connecting while the target's srst is asserted.
    Tested on stm32 family.
    
    Change-Id: I1197dd721a1e1cbf95ee77dfd8e1082b165b22a9
    Signed-off-by: Spencer Oliver <[email protected]>

diff --git a/src/target/stm32_stlink.c b/src/target/stm32_stlink.c
index f9daa01..254eefb 100644
--- a/src/target/stm32_stlink.c
+++ b/src/target/stm32_stlink.c
@@ -415,12 +415,22 @@ static int stm32_stlink_assert_reset(struct target 
*target)
 
        enum reset_types jtag_reset_config = jtag_get_reset_config();
 
+       bool srst_asserted = false;
+
+       if (jtag_reset_config & RESET_SRST_NO_GATING) {
+               jtag_add_reset(0, 1);
+               res = stlink_if->layout->api->assert_srst(stlink_if->fd, 0);
+               srst_asserted = true;
+       }
+
        stlink_if->layout->api->write_debug_reg(stlink_if->fd, DCB_DHCSR, 
DBGKEY|C_DEBUGEN);
        stlink_if->layout->api->write_debug_reg(stlink_if->fd, DCB_DEMCR, 
VC_CORERESET);
 
        if (jtag_reset_config & RESET_HAS_SRST) {
-               jtag_add_reset(0, 1);
-               res = stlink_if->layout->api->assert_srst(stlink_if->fd, 0);
+               if (!srst_asserted) {
+                       jtag_add_reset(0, 1);
+                       res = 
stlink_if->layout->api->assert_srst(stlink_if->fd, 0);
+               }
                if (res == ERROR_COMMAND_NOTFOUND)
                        LOG_ERROR("Hardware srst not supported, falling back to 
software reset");
                else if (res == ERROR_OK) {

-- 

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