Hi,

On Mon, Sep 23, 2013 at 01:38:09PM +0200, Nicolas Produit wrote:
> I am not sure to understand fully myself.
> GPIO IO registers (set reset read) in the recent documentation are also
> given in the 0x7E2xxx range and not in the 0x20... range.
> For some reason something (MMU?) remap 7E range to 20 range.

I see now, some random explanation from "the forums":
The addresses in the manual are from the perspective of the GPU's
address space. From the perspective of the GPU peripherals start at
0x7E000000. If you look at the address map picture though you see that
the ARM's memory map is a virtualized version of the real memory map
(the GPU's address space) and basically the ARM's address 0x20000000
lines up with the GPU's 0x7E000000.

Thank you for making me see that. I'd be grateful if you tested the
third patch incarnation (and also if you would avoid top-posting).

-- 
Be free, use free (http://www.gnu.org/philosophy/free-sw.html) software!
mailto:fercer...@gmail.com

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