This is an automated email from Gerrit. Vladimir Zapolskiy ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/1824
-- gerrit commit 1c13d5824dae5eca1f5491e36b156c0d504855a0 Author: Vladimir Zapolskiy <[email protected]> Date: Fri Nov 29 17:28:39 2013 +0200 targets: imx6: add smp support for imx6 SoCs This change adds several improvements to the target script: * base addresses for debug interface are corrected * added SJC id for i.MX6 Solo and i.MX6 Dual Lite * added a possibility to enable SMP support for dual and quad core SoCs, by default only one core is set up * a particular flavour of i.MX6 is chosen by CHIPNAME, by default i.MX6Q is selected Change-Id: I532c36f39e550cd4e2640719c3011436f4550ebe Signed-off-by: Vladimir Zapolskiy <[email protected]> diff --git a/tcl/target/imx6.cfg b/tcl/target/imx6.cfg index 622261f..fbf6fc4 100644 --- a/tcl/target/imx6.cfg +++ b/tcl/target/imx6.cfg @@ -20,27 +20,60 @@ jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x01 -irmask 0x0f \ jtag newtap $_CHIPNAME sdma -irlen 4 -ircapture 0x00 -irmask 0x0f # System JTAG Controller -if { [info exists SJC_TAPID] } { +set _SJC_TAPID_S 0x0191b01d +set _SJC_TAPID_DL 0x0191a01d +set _SJC_TAPID_D 0x0191e01d +set _SJC_TAPID_Q 0x0191c01d + +if { [info exists SJC_TAPID ] } { set _SJC_TAPID SJC_TAPID } else { - set _SJC_TAPID 0x0191c01d + switch $_CHIPNAME { + imx6s { set _SJC_TAPID $_SJC_TAPID_S } + imx6dl { set _SJC_TAPID $_SJC_TAPID_DL } + imx6d { set _SJC_TAPID $_SJC_TAPID_D } + imx6q { set _SJC_TAPID $_SJC_TAPID_Q } + default { set _SJC_TAPID $_SJC_TAPID_Q } + } } -set _SJC_TAPID2 0x2191c01d -set _SJC_TAPID3 0x2191e01d jtag newtap $_CHIPNAME sjc -irlen 5 -ircapture 0x01 -irmask 0x1f \ - -expected-id $_SJC_TAPID -expected-id $_SJC_TAPID2 \ - -expected-id $_SJC_TAPID3 + -expected-id $_SJC_TAPID -ignore-version # GDB target: Cortex-A9, using DAP, configuring only one core -# Base addresses of cores: -# core 0 - 0x82150000 -# core 1 - 0x82152000 -# core 2 - 0x82154000 -# core 3 - 0x82156000 -set _TARGETNAME $_CHIPNAME.cpu.0 -target create $_TARGETNAME cortex_a -chain-position $_CHIPNAME.dap \ - -coreid 0 -dbgbase 0x82150000 +# Base addresses of core debug interfaces: +# core 0 - 0x02150000 +# core 1 - 0x02152000 +# core 2 - 0x02154000 +# core 3 - 0x02156000 +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME.0 cortex_a \ + -chain-position $_CHIPNAME.dap \ + -coreid 0 -dbgbase 0x02150000 + +if { [ info exists SMP ] } { + switch $SMP { + 2 { + target create $_TARGETNAME.1 cortex_a \ + -chain-position $_CHIPNAME.dap \ + -coreid 1 -dbgbase 0x02152000 + target smp $_TARGETNAME.1 $_TARGETNAME.0 + } + 4 { + target create $_TARGETNAME.1 cortex_a \ + -chain-position $_CHIPNAME.dap \ + -coreid 1 -dbgbase 0x02152000 + target create $_TARGETNAME.2 cortex_a \ + -chain-position $_CHIPNAME.dap \ + -coreid 2 -dbgbase 0x02154000 + target create $_TARGETNAME.3 cortex_a \ + -chain-position $_CHIPNAME.dap \ + -coreid 3 -dbgbase 0x02156000 + target smp $_TARGETNAME.3 $_TARGETNAME.2 \ + $_TARGETNAME.1 $_TARGETNAME.0 + } + } +} # some TCK cycles are required to activate the DEBUG power domain jtag configure $_CHIPNAME.sjc -event post-reset "runtest 100" @@ -52,7 +85,13 @@ proc imx6_dbginit {target} { # Slow speed to be sure it will work adapter_khz 1000 -$_TARGETNAME configure -event reset-start { adapter_khz 1000 } -$_TARGETNAME configure -event reset-assert-post "imx6_dbginit $_TARGETNAME" -$_TARGETNAME configure -event gdb-attach { halt } +if { [ info exists SMP ] } { set _cores $SMP } else { set _cores 1 } +for { set _core 0 } { $_core < $_cores } { incr _core 1 } { + $_TARGETNAME.$_core configure \ + -event reset-start { adapter_khz 1000 } + $_TARGETNAME.$_core configure \ + -event reset-assert-post "imx6_dbginit $_TARGETNAME.$_core" + $_TARGETNAME.$_core configure \ + -event gdb-attach { halt } +} -- ------------------------------------------------------------------------------ Rapidly troubleshoot problems before they affect your business. Most IT organizations don't have a clear picture of how application performance affects their revenue. With AppDynamics, you get 100% visibility into your Java,.NET, & PHP application. Start your 15-day FREE TRIAL of AppDynamics Pro! http://pubads.g.doubleclick.net/gampad/clk?id=84349351&iu=/4140/ostg.clktrk _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
