On May 2, 2014, at 4:54 AM, Berk Akinci <[email protected]> wrote:

> 3) The BCM2835 SPI controller appears to be flexible enough to use as a JTAG 
> master.  The current SPI driver couldn’t accommodate JTAG.  If I go about 
> writing a new driver on the Pi, how should the interface look to the 
> application (OOCD specifically).  Do you have other JTAG interface that you 
> feel is such a good fit, I could use as an example?  (Or your dream JTAG 
> interface…)

I haven't looked at the controller itself, but the biggest problem with most 
SPI ports is that they're only able to shift out one bit at a time; you need to 
be shifting TMS and TDO out on the same clock edge.  Some SPI controllers allow 
dual/quad width SPI, which would handle that, but I don't know if that's true 
of the one on the Broadcom chip.

The other problem, as someone else mentioned, is that a lot of JTAG transfers 
aren't multiples of 8 or 4 bits; some SPI controllers allow arbitrary frame 
sizes, but not all do.  Again, not having looked at the spec on the Broadcom 
controller, I don't know if that's the case here.

You definitely want some sort of level-shifting external buffer, which is a 
simple and cheap board to build.  LOTS of JTAG targets are not 3.3v.

I'd be pleased to see something like this that approaches a nice speed.  The 
Linux userland GPIO layer is brain-dead and slow, as far as I'm concerned.  
It's entirely designed for control via shell scripts, and introduces a number 
of needless complications and overheads when controlling with a real program; I 
can't understand why there are no "raw" interfaces (ioctls or raw files for 
reading/writing bits, not text) to the GPIO pins, as that precludes setting 
bits in parallel on a port as well as introducing some really I/O overhead.  So 
if you've got something else up your sleeve, go for it!


- Dave


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