This is an automated email from Gerrit.

Andreas Fritiofson ([email protected]) just uploaded a new patch set 
to Gerrit, which you can find at http://openocd.zylin.com/2196

-- gerrit

commit e25952610eeb4fa9caa3457124e7199762f34454
Author: Andreas Fritiofson <[email protected]>
Date:   Thu Jul 3 19:33:45 2014 +0200

    tcl: Add default hooks for STM32F3x
    
    Keep clocks running in low power modes. Stop watchdogs from interfering
    with the debug session. Set up PLL and increase clock at reset init.
    
    Change-Id: I984d2018f7d47a1042f1e12894563154fa7b566c
    Signed-off-by: Andreas Fritiofson <[email protected]>

diff --git a/tcl/target/stm32f3x.cfg b/tcl/target/stm32f3x.cfg
index ec5941b..711d2a3 100644
--- a/tcl/target/stm32f3x.cfg
+++ b/tcl/target/stm32f3x.cfg
@@ -73,3 +73,33 @@ flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME
 # if srst is not fitted use SYSRESETREQ to
 # perform a soft reset
 cortex_m reset_config sysresetreq
+
+proc stm32f3x_default_reset_start {} {
+       # Reset clock is HSI (8 MHz)
+       adapter_khz 1000
+}
+
+proc stm32f3x_default_examine_end {} {
+       # Enable debug during low power modes (uses more power)
+       mww 0xe0042004 0x00000007 ;# DBGMCU_CR = DBG_STANDBY | DBG_STOP | 
DBG_SLEEP
+
+       # Stop watchdog counters during halt
+       mww 0xe0042008 0x00001800 ;# DBGMCU_APB1_FZ = DBG_IWDG_STOP | 
DBG_WWDG_STOP
+}
+
+proc stm32f3x_default_reset_init {} {
+       # Configure PLL to boost clock to HSI x 8 (64 MHz)
+       mww 0x40021004 0x00380400 ;# RCC_CFGR = PLLMUL[3:1] | PPRE1[2]
+       mwh 0x40021002 0x0100     ;# RCC_CR[31:16] = PLLON
+       mww 0x40022000 0x00000012 ;# FLASH_ACR = PRFTBE | LATENCY[1]
+       sleep 10                  ;# Wait for PLL to lock
+       mww 0x40021004 0x00380402 ;# RCC_CFGR |= SW[1]
+
+       # Boost JTAG frequency
+       adapter_khz 8000
+}
+
+# Default hooks
+$_TARGETNAME configure -event examine-end { stm32f3x_default_examine_end }
+$_TARGETNAME configure -event reset-start { stm32f3x_default_reset_start }
+$_TARGETNAME configure -event reset-init { stm32f3x_default_reset_init }

-- 

------------------------------------------------------------------------------
Open source business process management suite built on Java and Eclipse
Turn processes into business applications with Bonita BPM Community Edition
Quickly connect people, data, and systems into organized workflows
Winner of BOSSIE, CODIE, OW2 and Gartner awards
http://p.sf.net/sfu/Bonitasoft
_______________________________________________
OpenOCD-devel mailing list
[email protected]
https://lists.sourceforge.net/lists/listinfo/openocd-devel

Reply via email to