This is an automated email from Gerrit. Andrey Smirnov ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/2207
-- gerrit commit 0bc860b8c08039c1d3ddb15f96d663f2b3fcb66f Author: Andrey Smirnov <[email protected]> Date: Sat May 10 09:08:39 2014 -0700 armv7m: Remove struct armv7m_algorithm With target saved state information separated out of the armv7m_algorithm structure it contains only a subset of the fields offered by struct arm_algorithm, so there's no need to have a dedicated structure for ARMv7M. Change-Id: Iff3221c8740b53e9042351c05ce5061297342d70 Signed-off-by: Andrey Smirnov <[email protected]> diff --git a/src/flash/nand/arm_io.c b/src/flash/nand/arm_io.c index d54958a..0c65322 100644 --- a/src/flash/nand/arm_io.c +++ b/src/flash/nand/arm_io.c @@ -93,9 +93,7 @@ static int arm_code_to_working_area(struct target *target, int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size) { struct target *target = nand->target; - struct arm_algorithm armv4_5_algo; - struct armv7m_algorithm armv7m_algo; - void *arm_algo; + struct arm_algorithm arm_algo; struct arm *arm = target->arch_info; struct reg_param reg_params[3]; uint32_t target_buf; @@ -136,23 +134,22 @@ int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size) /* set up algorithm */ if (is_armv7m(target_to_armv7m(target))) { /* armv7m target */ - armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_algo.core_mode = ARM_MODE_THREAD; - arm_algo = &armv7m_algo; + arm_algo.common_magic = ARMV7M_COMMON_MAGIC; + arm_algo.core_mode = ARM_MODE_THREAD; + target_code_size = sizeof(code_armv7m); target_code_src = code_armv7m; } else { - armv4_5_algo.common_magic = ARM_COMMON_MAGIC; - armv4_5_algo.core_mode = ARM_MODE_SVC; - armv4_5_algo.core_state = ARM_STATE_ARM; - arm_algo = &armv4_5_algo; + arm_algo.common_magic = ARM_COMMON_MAGIC; + arm_algo.core_mode = ARM_MODE_SVC; + arm_algo.core_state = ARM_STATE_ARM; target_code_size = sizeof(code_armv4_5); target_code_src = code_armv4_5; } if (nand->op != ARM_NAND_WRITE || !nand->copy_area) { - retval = arm_code_to_working_area(target, target_code_src, target_code_size, - nand->chunk_size, &nand->copy_area); + retval = target_code_u32_to_working_area(target, target_code_src, target_code_size, + nand->chunk_size, &nand->copy_area); if (retval != ERROR_OK) return retval; } @@ -180,7 +177,7 @@ int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size) /* use alg to write data from work area to NAND chip */ retval = target_run_algorithm(target, 0, NULL, 3, reg_params, - nand->copy_area->address, exit_var, 1000, arm_algo); + nand->copy_area->address, exit_var, 1000, &arm_algo); if (retval != ERROR_OK) LOG_ERROR("error executing hosted NAND write"); @@ -203,9 +200,7 @@ int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size) int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size) { struct target *target = nand->target; - struct arm_algorithm armv4_5_algo; - struct armv7m_algorithm armv7m_algo; - void *arm_algo; + struct arm_algorithm arm_algo; struct arm *arm = target->arch_info; struct reg_param reg_params[3]; uint32_t target_buf; @@ -246,24 +241,22 @@ int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size) /* set up algorithm */ if (is_armv7m(target_to_armv7m(target))) { /* armv7m target */ - armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_algo.core_mode = ARM_MODE_THREAD; - arm_algo = &armv7m_algo; + arm_algo.common_magic = ARMV7M_COMMON_MAGIC; + arm_algo.core_mode = ARM_MODE_THREAD; target_code_size = sizeof(code_armv7m); target_code_src = code_armv7m; } else { - armv4_5_algo.common_magic = ARM_COMMON_MAGIC; - armv4_5_algo.core_mode = ARM_MODE_SVC; - armv4_5_algo.core_state = ARM_STATE_ARM; - arm_algo = &armv4_5_algo; + arm_algo.common_magic = ARM_COMMON_MAGIC; + arm_algo.core_mode = ARM_MODE_SVC; + arm_algo.core_state = ARM_STATE_ARM; target_code_size = sizeof(code_armv4_5); target_code_src = code_armv4_5; } /* create the copy area if not yet available */ if (nand->op != ARM_NAND_READ || !nand->copy_area) { - retval = arm_code_to_working_area(target, target_code_src, target_code_size, - nand->chunk_size, &nand->copy_area); + retval = target_code_u32_to_working_area(target, target_code_src, target_code_size, + nand->chunk_size, &nand->copy_area); if (retval != ERROR_OK) return retval; } @@ -286,7 +279,7 @@ int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size) /* use alg to write data from NAND chip to work area */ retval = target_run_algorithm(target, 0, NULL, 3, reg_params, - nand->copy_area->address, exit_var, 1000, arm_algo); + nand->copy_area->address, exit_var, 1000, &arm_algo); if (retval != ERROR_OK) LOG_ERROR("error executing hosted NAND read"); diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c index 97d3f19..c272210 100644 --- a/src/flash/nor/cfi.c +++ b/src/flash/nor/cfi.c @@ -1599,9 +1599,8 @@ static int cfi_spansion_write_block(struct flash_bank *bank, const uint8_t *buff struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext; struct target *target = bank->target; struct reg_param reg_params[10]; - void *arm_algo; - struct arm_algorithm armv4_5_algo; - struct armv7m_algorithm armv7m_algo; + struct arm_algorithm arm_algo; + struct working_area *write_algorithm; struct working_area *source; uint32_t buffer_size = 32768; @@ -1800,15 +1799,14 @@ static int cfi_spansion_write_block(struct flash_bank *bank, const uint8_t *buff return cfi_spansion_write_block_mips(bank, buffer, address, count); if (is_armv7m(target_to_armv7m(target))) { /* armv7m target */ - armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_algo.core_mode = ARM_MODE_THREAD; - arm_algo = &armv7m_algo; + arm_algo.common_magic = ARMV7M_COMMON_MAGIC; + arm_algo.core_mode = ARM_MODE_THREAD; + } else if (is_arm(target_to_arm(target))) { /* All other ARM CPUs have 32 bit instructions */ - armv4_5_algo.common_magic = ARM_COMMON_MAGIC; - armv4_5_algo.core_mode = ARM_MODE_SVC; - armv4_5_algo.core_state = ARM_STATE_ARM; - arm_algo = &armv4_5_algo; + arm_algo.common_magic = ARM_COMMON_MAGIC; + arm_algo.core_mode = ARM_MODE_SVC; + arm_algo.core_state = ARM_STATE_ARM; } else { LOG_ERROR("Unknown architecture"); return ERROR_FAIL; @@ -1940,7 +1938,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, const uint8_t *buff retval = target_run_algorithm(target, 0, NULL, 10, reg_params, write_algorithm->address, write_algorithm->address + ((target_code_size) - 4), - 10000, arm_algo); + 10000, &arm_algo); if (retval != ERROR_OK) break; diff --git a/src/flash/nor/efm32.c b/src/flash/nor/efm32.c index 35c0732..687978d 100644 --- a/src/flash/nor/efm32.c +++ b/src/flash/nor/efm32.c @@ -516,7 +516,7 @@ static int efm32x_write_block(struct flash_bank *bank, const uint8_t *buf, struct working_area *source; uint32_t address = bank->base + offset; struct reg_param reg_params[5]; - struct armv7m_algorithm armv7m_info; + struct arm_algorithm arm_info; int ret = ERROR_OK; /* see contrib/loaders/flash/efm32.S for src */ @@ -631,15 +631,15 @@ static int efm32x_write_block(struct flash_bank *bank, const uint8_t *buf, buf_set_u32(reg_params[3].value, 0, 32, source->address + source->size); buf_set_u32(reg_params[4].value, 0, 32, address); - armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_info.core_mode = ARM_MODE_THREAD; + arm_info.common_magic = ARMV7M_COMMON_MAGIC; + arm_info.core_mode = ARM_MODE_THREAD; ret = target_run_flash_async_algorithm(target, buf, count, 4, 0, NULL, 5, reg_params, source->address, source->size, write_algorithm->address, 0, - &armv7m_info); + &arm_info); if (ret == ERROR_FLASH_OPERATION_FAILED) { LOG_ERROR("flash write failed at address 0x%"PRIx32, diff --git a/src/flash/nor/em357.c b/src/flash/nor/em357.c index 70a5431..40ae835 100644 --- a/src/flash/nor/em357.c +++ b/src/flash/nor/em357.c @@ -464,7 +464,7 @@ static int em357_write_block(struct flash_bank *bank, const uint8_t *buffer, struct working_area *source; uint32_t address = bank->base + offset; struct reg_param reg_params[4]; - struct armv7m_algorithm armv7m_info; + struct arm_algorithm arm_info; int retval = ERROR_OK; /* see contib/loaders/flash/stm32x.s for src, the same is used here except for @@ -523,8 +523,8 @@ static int em357_write_block(struct flash_bank *bank, const uint8_t *buffer, } } - armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_info.core_mode = ARM_MODE_THREAD; + arm_info.common_magic = ARMV7M_COMMON_MAGIC; + arm_info.core_mode = ARM_MODE_THREAD; init_reg_param(®_params[0], "r0", 32, PARAM_OUT); init_reg_param(®_params[1], "r1", 32, PARAM_OUT); @@ -545,7 +545,7 @@ static int em357_write_block(struct flash_bank *bank, const uint8_t *buffer, buf_set_u32(reg_params[3].value, 0, 32, 0); retval = target_run_algorithm(target, 0, NULL, 4, reg_params, - write_algorithm->address, 0, 10000, &armv7m_info); + write_algorithm->address, 0, 10000, &arm_info); if (retval != ERROR_OK) { LOG_ERROR("error executing em357 flash write algorithm"); break; diff --git a/src/flash/nor/fm3.c b/src/flash/nor/fm3.c index d4bd5b9..5bb393d 100644 --- a/src/flash/nor/fm3.c +++ b/src/flash/nor/fm3.c @@ -216,7 +216,7 @@ static int fm3_erase(struct flash_bank *bank, int first, int last) struct working_area *write_algorithm; struct reg_param reg_params[3]; - struct armv7m_algorithm armv7m_info; + struct arm_algorithm arm_info; u32FlashType = (uint32_t) fm3_info->flashtype; @@ -298,8 +298,8 @@ static int fm3_erase(struct flash_bank *bank, int first, int last) if (retval != ERROR_OK) return retval; - armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_info.core_mode = ARM_MODE_THREAD; + arm_info.common_magic = ARMV7M_COMMON_MAGIC; + arm_info.core_mode = ARM_MODE_THREAD; init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* u32FlashSeqAddress1 */ init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* u32FlashSeqAddress2 */ @@ -318,7 +318,7 @@ static int fm3_erase(struct flash_bank *bank, int first, int last) buf_set_u32(reg_params[2].value, 0, 32, offset); retval = target_run_algorithm(target, 0, NULL, 3, reg_params, - write_algorithm->address, 0, 100000, &armv7m_info); + write_algorithm->address, 0, 100000, &arm_info); if (retval != ERROR_OK) { LOG_ERROR("Error executing flash erase programming algorithm"); retval = ERROR_FLASH_OPERATION_FAILED; @@ -357,7 +357,7 @@ static int fm3_write_block(struct flash_bank *bank, const uint8_t *buffer, struct working_area *source; uint32_t address = bank->base + offset; struct reg_param reg_params[6]; - struct armv7m_algorithm armv7m_info; + struct arm_algorithm arm_info; int retval = ERROR_OK; uint32_t u32FlashType; uint32_t u32FlashSeqAddress1; @@ -574,8 +574,8 @@ static int fm3_write_block(struct flash_bank *bank, const uint8_t *buffer, } } - armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_info.core_mode = ARM_MODE_THREAD; + arm_info.common_magic = ARMV7M_COMMON_MAGIC; + arm_info.core_mode = ARM_MODE_THREAD; init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* source start address */ init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* target start address */ @@ -600,7 +600,7 @@ static int fm3_write_block(struct flash_bank *bank, const uint8_t *buffer, buf_set_u32(reg_params[4].value, 0, 32, u32FlashSeqAddress2); retval = target_run_algorithm(target, 0, NULL, 6, reg_params, - (write_algorithm->address + 8), 0, 1000, &armv7m_info); + (write_algorithm->address + 8), 0, 1000, &arm_info); if (retval != ERROR_OK) { LOG_ERROR("Error executing fm3 Flash programming algorithm"); retval = ERROR_FLASH_OPERATION_FAILED; @@ -824,7 +824,7 @@ static int fm3_chip_erase(struct flash_bank *bank) struct working_area *write_algorithm; struct reg_param reg_params[3]; - struct armv7m_algorithm armv7m_info; + struct arm_algorithm arm_info; u32FlashType = (uint32_t) fm3_info2->flashtype; @@ -907,8 +907,8 @@ static int fm3_chip_erase(struct flash_bank *bank) if (retval != ERROR_OK) return retval; - armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_info.core_mode = ARM_MODE_THREAD; + arm_info.common_magic = ARMV7M_COMMON_MAGIC; + arm_info.core_mode = ARM_MODE_THREAD; init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* u32FlashSeqAddress1 */ init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* u32FlashSeqAddress2 */ @@ -917,7 +917,7 @@ static int fm3_chip_erase(struct flash_bank *bank) buf_set_u32(reg_params[1].value, 0, 32, u32FlashSeqAddress2); retval = target_run_algorithm(target, 0, NULL, 2, reg_params, - write_algorithm->address, 0, 100000, &armv7m_info); + write_algorithm->address, 0, 100000, &arm_info); if (retval != ERROR_OK) { LOG_ERROR("Error executing flash erase programming algorithm"); retval = ERROR_FLASH_OPERATION_FAILED; diff --git a/src/flash/nor/kinetis.c b/src/flash/nor/kinetis.c index e8917c7..e797fb9 100644 --- a/src/flash/nor/kinetis.c +++ b/src/flash/nor/kinetis.c @@ -560,7 +560,7 @@ static int kinetis_write_block(struct flash_bank *bank, const uint8_t *buffer, struct working_area *source; uint32_t address = bank->base + offset; struct reg_param reg_params[3]; - struct armv7m_algorithm armv7m_info; + struct arm_algorithm arm_info; int retval = ERROR_OK; /* Params: @@ -610,8 +610,8 @@ static int kinetis_write_block(struct flash_bank *bank, const uint8_t *buffer, } } - armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_info.core_mode = ARM_MODE_THREAD; + arm_info.common_magic = ARMV7M_COMMON_MAGIC; + arm_info.core_mode = ARM_MODE_THREAD; init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* *pLW (*buffer) */ init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* faddr */ @@ -631,7 +631,7 @@ static int kinetis_write_block(struct flash_bank *bank, const uint8_t *buffer, buf_set_u32(reg_params[2].value, 0, 32, thisrun_count); retval = target_run_algorithm(target, 0, NULL, 3, reg_params, - write_algorithm->address, 0, 100000, &armv7m_info); + write_algorithm->address, 0, 100000, &arm_info); if (retval != ERROR_OK) { LOG_ERROR("Error executing kinetis Flash programming algorithm"); retval = ERROR_FLASH_OPERATION_FAILED; diff --git a/src/flash/nor/lpc2000.c b/src/flash/nor/lpc2000.c index 0af00f9..029bd5b 100644 --- a/src/flash/nor/lpc2000.c +++ b/src/flash/nor/lpc2000.c @@ -594,8 +594,7 @@ static int lpc2000_iap_call(struct flash_bank *bank, struct working_area *iap_wo struct lpc2000_flash_bank *lpc2000_info = bank->driver_priv; struct target *target = bank->target; - struct arm_algorithm arm_algo; /* for LPC2000 */ - struct armv7m_algorithm armv7m_info; /* for LPC1700 */ + struct arm_algorithm arm_info; /* for LPC1700 */ uint32_t iap_entry_point = 0; /* to make compiler happier */ switch (lpc2000_info->variant) { @@ -603,20 +602,20 @@ static int lpc2000_iap_call(struct flash_bank *bank, struct working_area *iap_wo case lpc1100: case lpc1700: case lpc_auto: - armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_info.core_mode = ARM_MODE_THREAD; + arm_info.common_magic = ARMV7M_COMMON_MAGIC; + arm_info.core_mode = ARM_MODE_THREAD; iap_entry_point = 0x1fff1ff1; break; case lpc2000_v1: case lpc2000_v2: - arm_algo.common_magic = ARM_COMMON_MAGIC; - arm_algo.core_mode = ARM_MODE_SVC; - arm_algo.core_state = ARM_STATE_ARM; + arm_info.common_magic = ARM_COMMON_MAGIC; + arm_info.core_mode = ARM_MODE_SVC; + arm_info.core_state = ARM_STATE_ARM; iap_entry_point = 0x7ffffff1; break; case lpc4300: - armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_info.core_mode = ARM_MODE_THREAD; + arm_info.common_magic = ARMV7M_COMMON_MAGIC; + arm_info.core_mode = ARM_MODE_THREAD; /* read out IAP entry point from ROM driver table at 0x10400100 */ target_read_u32(target, 0x10400100, &iap_entry_point); break; @@ -668,7 +667,7 @@ static int lpc2000_iap_call(struct flash_bank *bank, struct working_area *iap_wo /* bit0 of LR = 1 to return in Thumb mode */ target_run_algorithm(target, 2, mem_params, 5, reg_params, iap_working_area->address, 0, 10000, - &armv7m_info); + &arm_info); break; case lpc2000_v1: case lpc2000_v2: @@ -682,7 +681,7 @@ static int lpc2000_iap_call(struct flash_bank *bank, struct working_area *iap_wo buf_set_u32(reg_params[4].value, 0, 32, iap_working_area->address + 0x04); target_run_algorithm(target, 2, mem_params, 5, reg_params, iap_working_area->address, - iap_working_area->address + 0x4, 10000, &arm_algo); + iap_working_area->address + 0x4, 10000, &arm_info); break; default: LOG_ERROR("BUG: unknown lpc2000->variant encountered"); diff --git a/src/flash/nor/lpcspifi.c b/src/flash/nor/lpcspifi.c index 7355c30..478f6a8 100644 --- a/src/flash/nor/lpcspifi.c +++ b/src/flash/nor/lpcspifi.c @@ -153,7 +153,7 @@ static int lpcspifi_set_hw_mode(struct flash_bank *bank) struct target *target = bank->target; struct lpcspifi_flash_bank *lpcspifi_info = bank->driver_priv; uint32_t ssp_base = lpcspifi_info->ssp_base; - struct armv7m_algorithm armv7m_info; + struct arm_algorithm arm_info; struct working_area *spifi_init_algorithm; struct reg_param reg_params[2]; int retval = ERROR_OK; @@ -185,8 +185,8 @@ static int lpcspifi_set_hw_mode(struct flash_bank *bank) 0xa0, 0x47, 0x00, 0xf0, 0x00, 0xb8, 0x00, 0xbe }; - armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_info.core_mode = ARM_MODE_THREAD; + arm_info.common_magic = ARMV7M_COMMON_MAGIC; + arm_info.core_mode = ARM_MODE_THREAD; LOG_DEBUG("Allocating working area for SPIFI init algorithm"); @@ -236,7 +236,7 @@ static int lpcspifi_set_hw_mode(struct flash_bank *bank) retval = target_run_algorithm(target, 0 , NULL, 2, reg_params, spifi_init_algorithm->address, spifi_init_algorithm->address + sizeof(spifi_init_code) - 2, - 1000, &armv7m_info); + 1000, &arm_info); if (retval != ERROR_OK) LOG_ERROR("Error executing SPIFI init algorithm"); @@ -433,7 +433,7 @@ static int lpcspifi_erase(struct flash_bank *bank, int first, int last) struct target *target = bank->target; struct lpcspifi_flash_bank *lpcspifi_info = bank->driver_priv; struct reg_param reg_params[4]; - struct armv7m_algorithm armv7m_info; + struct arm_algorithm arm_info; struct working_area *erase_algorithm; int retval = ERROR_OK; int sector; @@ -528,8 +528,8 @@ static int lpcspifi_erase(struct flash_bank *bank, int first, int last) 0x70, 0x47, 0x00, 0x20, 0x00, 0xbe, 0xff, 0xff }; - armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_info.core_mode = ARM_MODE_THREAD; + arm_info.common_magic = ARMV7M_COMMON_MAGIC; + arm_info.core_mode = ARM_MODE_THREAD; /* Get memory for spifi initialization algorithm */ @@ -564,7 +564,7 @@ static int lpcspifi_erase(struct flash_bank *bank, int first, int last) retval = target_run_algorithm(target, 0 , NULL, 4, reg_params, erase_algorithm->address, erase_algorithm->address + sizeof(lpcspifi_flash_erase_code) - 4, - 3000*(last - first + 1), &armv7m_info); + 3000*(last - first + 1), &arm_info); if (retval != ERROR_OK) LOG_ERROR("Error executing flash erase algorithm"); @@ -599,7 +599,7 @@ static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t page_size, fifo_size; struct working_area *fifo; struct reg_param reg_params[5]; - struct armv7m_algorithm armv7m_info; + struct arm_algorithm arm_info; struct working_area *write_algorithm; int sector; int retval = ERROR_OK; @@ -735,8 +735,8 @@ static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer, return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; }; - armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_info.core_mode = ARM_MODE_THREAD; + arm_info.common_magic = ARMV7M_COMMON_MAGIC; + arm_info.core_mode = ARM_MODE_THREAD; init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* buffer start, status (out) */ init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* buffer end */ @@ -755,7 +755,7 @@ static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer, 5, reg_params, fifo->address, fifo->size, write_algorithm->address, 0, - &armv7m_info + &arm_info ); if (retval != ERROR_OK) diff --git a/src/flash/nor/mdr.c b/src/flash/nor/mdr.c index ed76aab..bc8d6be 100644 --- a/src/flash/nor/mdr.c +++ b/src/flash/nor/mdr.c @@ -232,7 +232,7 @@ static int mdr_write_block(struct flash_bank *bank, const uint8_t *buffer, struct working_area *source; uint32_t address = bank->base + offset; struct reg_param reg_params[5]; - struct armv7m_algorithm armv7m_info; + struct arm_algorithm arm_info; int retval = ERROR_OK; /* see contrib/loaders/flash/mdr32fx.S for src */ @@ -288,15 +288,15 @@ static int mdr_write_block(struct flash_bank *bank, const uint8_t *buffer, buf_set_u32(reg_params[3].value, 0, 32, source->address + source->size); buf_set_u32(reg_params[4].value, 0, 32, address); - armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_info.core_mode = ARM_MODE_THREAD; + arm_info.common_magic = ARMV7M_COMMON_MAGIC; + arm_info.core_mode = ARM_MODE_THREAD; retval = target_run_flash_async_algorithm(target, buffer, count, 4, 0, NULL, 5, reg_params, source->address, source->size, write_algorithm->address, 0, - &armv7m_info); + &arm_info); if (retval == ERROR_FLASH_OPERATION_FAILED) LOG_ERROR("flash write failed at address 0x%"PRIx32, diff --git a/src/flash/nor/stellaris.c b/src/flash/nor/stellaris.c index 7665ab3..12f1de0 100644 --- a/src/flash/nor/stellaris.c +++ b/src/flash/nor/stellaris.c @@ -1005,7 +1005,7 @@ static int stellaris_write_block(struct flash_bank *bank, struct working_area *write_algorithm; uint32_t address = bank->base + offset; struct reg_param reg_params[4]; - struct armv7m_algorithm armv7m_info; + struct arm_algorithm arm_info; int retval = ERROR_OK; /* power of two, and multiple of word size */ @@ -1044,8 +1044,8 @@ static int stellaris_write_block(struct flash_bank *bank, sizeof(stellaris_write_code), stellaris_write_code); - armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_info.core_mode = ARM_MODE_THREAD; + arm_info.common_magic = ARMV7M_COMMON_MAGIC; + arm_info.core_mode = ARM_MODE_THREAD; init_reg_param(®_params[0], "r0", 32, PARAM_OUT); init_reg_param(®_params[1], "r1", 32, PARAM_OUT); @@ -1062,7 +1062,7 @@ static int stellaris_write_block(struct flash_bank *bank, 4, reg_params, source->address, source->size, write_algorithm->address, 0, - &armv7m_info); + &arm_info); if (retval == ERROR_FLASH_OPERATION_FAILED) LOG_ERROR("error %d executing stellaris flash write algorithm", retval); diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c index 601417a..4ffd65c 100644 --- a/src/flash/nor/stm32f1x.c +++ b/src/flash/nor/stm32f1x.c @@ -571,7 +571,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer, struct working_area *source; uint32_t address = bank->base + offset; struct reg_param reg_params[5]; - struct armv7m_algorithm armv7m_info; + struct arm_algorithm arm_info; int retval = ERROR_OK; /* see contrib/loaders/flash/stm32f1x.S for src */ @@ -653,15 +653,15 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer, buf_set_u32(reg_params[3].value, 0, 32, source->address + source->size); buf_set_u32(reg_params[4].value, 0, 32, address); - armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_info.core_mode = ARM_MODE_THREAD; + arm_info.common_magic = ARMV7M_COMMON_MAGIC; + arm_info.core_mode = ARM_MODE_THREAD; retval = target_run_flash_async_algorithm(target, buffer, count, 2, 0, NULL, 5, reg_params, source->address, source->size, write_algorithm->address, 0, - &armv7m_info); + &arm_info); if (retval == ERROR_FLASH_OPERATION_FAILED) { LOG_ERROR("flash write failed at address 0x%"PRIx32, diff --git a/src/flash/nor/stm32f2x.c b/src/flash/nor/stm32f2x.c index 56fd9f6..d142e01 100644 --- a/src/flash/nor/stm32f2x.c +++ b/src/flash/nor/stm32f2x.c @@ -490,7 +490,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer, struct working_area *source; uint32_t address = bank->base + offset; struct reg_param reg_params[5]; - struct armv7m_algorithm armv7m_info; + struct arm_algorithm arm_info; int retval = ERROR_OK; /* see contrib/loaders/flash/stm32f2x.S for src */ @@ -558,8 +558,8 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer, } }; - armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_info.core_mode = ARM_MODE_THREAD; + arm_info.common_magic = ARMV7M_COMMON_MAGIC; + arm_info.core_mode = ARM_MODE_THREAD; init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* buffer start, status (out) */ init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* buffer end */ @@ -578,7 +578,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer, 5, reg_params, source->address, source->size, write_algorithm->address, 0, - &armv7m_info); + &arm_info); if (retval == ERROR_FLASH_OPERATION_FAILED) { LOG_ERROR("error executing stm32x flash write algorithm"); diff --git a/src/flash/nor/stm32lx.c b/src/flash/nor/stm32lx.c index 75cecce..e9109a7 100644 --- a/src/flash/nor/stm32lx.c +++ b/src/flash/nor/stm32lx.c @@ -222,7 +222,7 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff uint32_t address = bank->base + offset; struct reg_param reg_params[3]; - struct armv7m_algorithm armv7m_info; + struct arm_algorithm arm_info; int retval = ERROR_OK; @@ -285,8 +285,8 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff } } - armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_info.core_mode = ARM_MODE_THREAD; + arm_info.common_magic = ARMV7M_COMMON_MAGIC; + arm_info.core_mode = ARM_MODE_THREAD; init_reg_param(®_params[0], "r0", 32, PARAM_OUT); init_reg_param(®_params[1], "r1", 32, PARAM_OUT); init_reg_param(®_params[2], "r2", 32, PARAM_OUT); @@ -336,7 +336,7 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff /* 5: Execute the bunch of code */ retval = target_run_algorithm(target, 0, NULL, sizeof(reg_params) / sizeof(*reg_params), reg_params, - write_algorithm->address, 0, 10000, &armv7m_info); + write_algorithm->address, 0, 10000, &arm_info); if (retval != ERROR_OK) break; diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 94bfc07..88fc93b 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -303,7 +303,7 @@ int armv7m_start_algorithm(struct target *target, { struct armv7m_algorithm_scratchpad *scratchpad; struct armv7m_common *armv7m = target_to_armv7m(target); - struct armv7m_algorithm *armv7m_algorithm_info = arch_info; + struct arm_algorithm *algorithm_info = arch_info; enum arm_mode core_mode = armv7m->arm.core_mode; int retval = ERROR_OK; @@ -317,12 +317,12 @@ int armv7m_start_algorithm(struct target *target, /* NOTE: armv7m_run_algorithm requires that each algorithm uses a software breakpoint * at the exit point */ - if (armv7m_algorithm_info->common_magic != ARMV7M_COMMON_MAGIC) { + if (algorithm_info->common_magic != ARMV7M_COMMON_MAGIC) { LOG_ERROR("current target isn't an ARMV7M target"); return ERROR_TARGET_INVALID; } - scratchpad->common_magic = armv7m_algorithm_info->common_magic; + scratchpad->common_magic = algorithm_info->common_magic; if (target->state != TARGET_HALTED) { LOG_WARNING("target not halted"); @@ -365,20 +365,20 @@ int armv7m_start_algorithm(struct target *target, armv7m_set_core_reg(reg, reg_params[i].value); } - if (armv7m_algorithm_info->core_mode != ARM_MODE_ANY && - armv7m_algorithm_info->core_mode != core_mode) { - + if (algorithm_info->core_mode != ARM_MODE_ANY && + algorithm_info->core_mode != core_mode) { /* we cannot set ARM_MODE_HANDLER, so use ARM_MODE_THREAD instead */ - if (armv7m_algorithm_info->core_mode == ARM_MODE_HANDLER) { - armv7m_algorithm_info->core_mode = ARM_MODE_THREAD; + if (algorithm_info->core_mode == ARM_MODE_HANDLER) { + algorithm_info->core_mode = ARM_MODE_THREAD; LOG_INFO("ARM_MODE_HANDLER not currently supported, using ARM_MODE_THREAD instead"); } - LOG_DEBUG("setting core_mode: 0x%2.2x", armv7m_algorithm_info->core_mode); - buf_set_u32(armv7m->arm.core_cache->reg_list[ARMV7M_CONTROL].value, - 0, 1, armv7m_algorithm_info->core_mode); - armv7m->arm.core_cache->reg_list[ARMV7M_CONTROL].dirty = 1; - armv7m->arm.core_cache->reg_list[ARMV7M_CONTROL].valid = 1; + LOG_DEBUG("setting core_mode: 0x%2.2x", algorithm_info->core_mode); + + struct reg *control = &armv7m->arm.core_cache->reg_list[ARMV7M_CONTROL]; + buf_set_u32(control->value, 0, 1, algorithm_info->core_mode); + control->dirty = 1; + control->valid = 1; } /* save previous core mode */ @@ -625,7 +625,7 @@ int armv7m_checksum_memory(struct target *target, uint32_t address, uint32_t count, uint32_t *checksum) { struct working_area *crc_algorithm; - struct armv7m_algorithm armv7m_info; + struct arm_algorithm arm_info; struct reg_param reg_params[2]; int retval; @@ -674,8 +674,8 @@ int armv7m_checksum_memory(struct target *target, if (retval != ERROR_OK) goto cleanup; - armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_info.core_mode = ARM_MODE_THREAD; + arm_info.common_magic = ARMV7M_COMMON_MAGIC; + arm_info.core_mode = ARM_MODE_THREAD; init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); init_reg_param(®_params[1], "r1", 32, PARAM_OUT); @@ -687,7 +687,7 @@ int armv7m_checksum_memory(struct target *target, retval = target_run_algorithm(target, 0, NULL, 2, reg_params, crc_algorithm->address, crc_algorithm->address + (sizeof(cortex_m_crc_code) - 6), - timeout, &armv7m_info); + timeout, &arm_info); if (retval == ERROR_OK) *checksum = buf_get_u32(reg_params[0].value, 0, 32); @@ -709,7 +709,7 @@ int armv7m_blank_check_memory(struct target *target, { struct working_area *erase_check_algorithm; struct reg_param reg_params[3]; - struct armv7m_algorithm armv7m_info; + struct arm_algorithm arm_info; int retval; /* see contrib/loaders/erase_check/armv7m_erase_check.s for src */ @@ -734,8 +734,8 @@ int armv7m_blank_check_memory(struct target *target, if (retval != ERROR_OK) return retval; - armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; - armv7m_info.core_mode = ARM_MODE_THREAD; + arm_info.common_magic = ARMV7M_COMMON_MAGIC; + arm_info.core_mode = ARM_MODE_THREAD; init_reg_param(®_params[0], "r0", 32, PARAM_OUT); buf_set_u32(reg_params[0].value, 0, 32, address); @@ -754,7 +754,7 @@ int armv7m_blank_check_memory(struct target *target, erase_check_algorithm->address, erase_check_algorithm->address + (sizeof(erase_check_code) - 2), 10000, - &armv7m_info); + &arm_info); if (retval == ERROR_OK) *blank = buf_get_u32(reg_params[2].value, 0, 32); diff --git a/src/target/armv7m.h b/src/target/armv7m.h index 2ebad87..f1a7520 100644 --- a/src/target/armv7m.h +++ b/src/target/armv7m.h @@ -173,12 +173,6 @@ static inline bool is_armv7m(struct armv7m_common *armv7m) return armv7m->common_magic == ARMV7M_COMMON_MAGIC; } -struct armv7m_algorithm { - int common_magic; - - enum arm_mode core_mode; -}; - struct reg_cache *armv7m_build_reg_cache(struct target *target); enum armv7m_mode armv7m_number_to_mode(int number); int armv7m_mode_to_number(enum armv7m_mode mode); -- ------------------------------------------------------------------------------ _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
