This is an automated email from Gerrit. Jim Paris (j...@jtan.com) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/2363
-- gerrit commit 933b7404d37a6cb523db01bad120c90f15faeedc Author: Jim Paris <j...@jtan.com> Date: Wed Oct 29 19:00:52 2014 -0400 nrf51: verify that UICR needs erasing before triggering an error about it If the UICR is already empty, there's no reason to return an error just because it can't be erased again. This happens, for example, when flashing UICR from GDB after a "monitor nrf51 mass_erase". Change-Id: Ia6d28c43189205fb5a7120b1c7312e45eb32edb7 Signed-off-by: Jim Paris <j...@jtan.com> diff --git a/src/flash/nor/nrf51.c b/src/flash/nor/nrf51.c index 5503320..d11b6fd 100644 --- a/src/flash/nor/nrf51.c +++ b/src/flash/nor/nrf51.c @@ -581,6 +581,12 @@ static int nrf51_erase_page(struct flash_bank *bank, } if ((ppfc & 0xFF) == 0xFF) { + /* We can't erase the UICR. Double-check to + see if it's already erased before complaining. */ + default_flash_blank_check(bank); + if (sector->is_erased) + return ERROR_OK; + LOG_ERROR("The chip was not pre-programmed with SoftDevice stack and UICR cannot be erased separately. Please issue mass erase before trying to write to this region"); return ERROR_FAIL; }; -- ------------------------------------------------------------------------------ _______________________________________________ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel