This is an automated email from Gerrit. Peter Lawrence (majbt...@gmail.com) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/2374
-- gerrit commit d44be59a86c6291356ca6256b061042255ec1476 Author: Peter Lawrence <majbt...@gmail.com> Date: Mon Nov 3 20:53:51 2014 -0700 arm_adi_v5: APB-AP fix for mem_ap_write() and map_ap_read() try4 The existing routines evaluate packed transfers based on AP 0, but then apply this setting to all APs. Packed transfers are not supported by APB-AP. Say AP 0 is an AHB-AP and AP 1 is an APB-AP; the existing code will detect packed transfers on AP 0 and then incorrectly attempt to use packed transfers on AP 1. Change-Id: I4688e1fd63b6294993c15454f073c431e5310beb Signed-off-by: Peter Lawrence <majbt...@gmail.com> diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index fbfc588..fbdbb05 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -335,10 +335,8 @@ int mem_ap_write(struct adiv5_dap *dap, const uint8_t *buffer, uint32_t size, ui uint32_t this_size = size; /* Select packed transfer if possible */ - /* per DDI 0314 Tables 2-20 (AHB-AP) and (APB-AP), packed transfers are not supported in APB-AP */ if (addrinc && dap->packed_transfers && nbytes >= 4 - && max_tar_block_size(dap->tar_autoincr_block, address) >= 4 - && (AP_REG_IDR_APID_APB_AP != (dap->apid & AP_REG_IDR_APID_MASK))) { + && max_tar_block_size(dap->tar_autoincr_block, address) >= 4) { this_size = 4; retval = dap_setup_accessport_csw(dap, csw_size | CSW_ADDRINC_PACKED); } else { @@ -472,10 +470,8 @@ int mem_ap_read(struct adiv5_dap *dap, uint8_t *buffer, uint32_t size, uint32_t uint32_t this_size = size; /* Select packed transfer if possible */ - /* per DDI 0314 Tables 2-20 (AHB-AP) and (APB-AP), packed transfers are not supported in APB-AP */ if (addrinc && dap->packed_transfers && nbytes >= 4 - && max_tar_block_size(dap->tar_autoincr_block, address) >= 4 - && (AP_REG_IDR_APID_APB_AP != (dap->apid & AP_REG_IDR_APID_MASK))) { + && max_tar_block_size(dap->tar_autoincr_block, address) >= 4) { this_size = 4; retval = dap_setup_accessport_csw(dap, csw_size | CSW_ADDRINC_PACKED); } else { @@ -633,6 +629,55 @@ extern const struct dap_ops jtag_dp_ops; /*--------------------------------------------------------------------------*/ /** + * Evaluate whether the current AP is capable of supporting packed transfers + * and set the "packed_transfers" member of parameter "dap" + * + * @param dap The DAP being utilized. + */ +static int check_for_packed_transfer_support(struct adiv5_dap *dap) +{ + int retval; + uint32_t csw, cfg; + + /* start with the most compatible setting */ + dap->packed_transfers = false; + + retval = dap_setup_accessport(dap, CSW_8BIT | CSW_ADDRINC_PACKED, 0); + if (retval != ERROR_OK) + return retval; + + retval = dap_queue_ap_read(dap, AP_REG_CSW, &csw); + if (retval != ERROR_OK) + return retval; + + retval = dap_queue_ap_read(dap, AP_REG_CFG, &cfg); + if (retval != ERROR_OK) + return retval; + + retval = dap_run(dap); + if (retval != ERROR_OK) + return retval; + + if (csw & CSW_ADDRINC_PACKED) + dap->packed_transfers = true; + else + dap->packed_transfers = false; + + /* Packed transfers on TI BE-32 processors do not work correctly in + * many cases. */ + if (dap->ti_be_32_quirks) + dap->packed_transfers = false; + + LOG_DEBUG("MEM_AP Packed Transfers: %s", + dap->packed_transfers ? "enabled" : "disabled"); + + LOG_DEBUG("MEM_AP CFG: large data %d, long address %d, big-endian %d", + !!(cfg & 0x04), !!(cfg & 0x02), !!(cfg & 0x01)); + + return ERROR_OK; +} + +/** * Initialize a DAP. This sets up the power domains, prepares the DP * for further use, and arranges to use AP #0 for all AP operations * until dap_ap-select() changes that policy. @@ -716,37 +761,10 @@ int ahbap_debugport_init(struct adiv5_dap *dap) return retval; /* check that we support packed transfers */ - uint32_t csw, cfg; - - retval = dap_setup_accessport(dap, CSW_8BIT | CSW_ADDRINC_PACKED, 0); - if (retval != ERROR_OK) - return retval; - - retval = dap_queue_ap_read(dap, AP_REG_CSW, &csw); - if (retval != ERROR_OK) - return retval; - - retval = dap_queue_ap_read(dap, AP_REG_CFG, &cfg); - if (retval != ERROR_OK) - return retval; - - retval = dap_run(dap); + retval = check_for_packed_transfer_support(dap); if (retval != ERROR_OK) return retval; - if (csw & CSW_ADDRINC_PACKED) - dap->packed_transfers = true; - else - dap->packed_transfers = false; - - /* Packed transfers on TI BE-32 processors do not work correctly in - * many cases. */ - if (dap->ti_be_32_quirks) - dap->packed_transfers = false; - - LOG_DEBUG("MEM_AP Packed Transfers: %s", - dap->packed_transfers ? "enabled" : "disabled"); - /* The ARM ADI spec leaves implementation-defined whether unaligned * memory accesses work, only work partially, or cause a sticky error. * On TI BE-32 processors, reads seem to return garbage in some bytes @@ -755,9 +773,6 @@ int ahbap_debugport_init(struct adiv5_dap *dap) * operations are supported on other processors. */ dap->unaligned_access_bad = dap->ti_be_32_quirks; - LOG_DEBUG("MEM_AP CFG: large data %d, long address %d, big-endian %d", - !!(cfg & 0x04), !!(cfg & 0x02), !!(cfg & 0x01)); - return ERROR_OK; } @@ -1543,11 +1558,13 @@ COMMAND_HANDLER(dap_apsel_command) if (retval != ERROR_OK) return retval; - dap->apid = apid; - command_print(CMD_CTX, "ap %" PRIi32 " selected, identification register 0x%8.8" PRIx32, apsel, apid); + retval = check_for_packed_transfer_support(dap); + if (retval != ERROR_OK) + return retval; + return retval; } diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h index 39f2a6c..dee3117 100644 --- a/src/target/arm_adi_v5.h +++ b/src/target/arm_adi_v5.h @@ -104,11 +104,6 @@ /* Generic AP register address */ #define AP_REG_IDR 0xFC -/* Fields of the MEM-AP's IDR register */ -#define AP_REG_IDR_APID_MASK (255UL << 0) -#define AP_REG_IDR_APID_AHB_AP (1UL << 0) -#define AP_REG_IDR_APID_APB_AP (2UL << 0) - /* Fields of the MEM-AP's CSW register */ #define CSW_8BIT 0 #define CSW_16BIT 1 @@ -151,7 +146,6 @@ struct adiv5_dap { uint32_t apcsw[256]; uint32_t apsel; - uint32_t apid; /** * Cache for DP_SELECT bits identifying the current AP. A DAP may -- ------------------------------------------------------------------------------ _______________________________________________ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel