Hello,
trying to debug on another Nucleo F411 board with some NutOs Program (__WFI
in the idle loop), I have now hit again a state where I can't get openocd to
work with the board.
- Detach USB, board is unpowered, NutOs program in flash.
- Reattach USB, first start of OpenOcd give a loop of
Error: jtag status contains invalid mode value - communication failure
Polling target stm32f4x.cpu failed, GDB will be halted. Polling again in 100ms
Info : Previous state query failed, trying to reconnect
Polling target stm32f4x.cpu succeeded again, trying to reexamine
- Second start of OpenOcd seems fine:
Info : 5 kHz
Info : stm32f4x.cpu: hardware has 6 breakpoints, 4 watchpoints
Info : accepting 'gdb' connection on tcp/3333
Info : device id = 0x10006431
Warn : STM32 flash size failed, probe inaccurate - assuming 512k flash
Info : flash size = 512kbytes
undefined debug reason 7 - target needs reset
- Start gdb, "tar ext :3333", "mon reset halt", Set breakpoint at very
start (NutInit), "r"
- Nothing happend. "Ctrl-C" in gdb give on openocd terminal
xPSR: 0x01000000 pc: 0x0800009c msp: 0x20000588
Info : The target is not running when halt was requested, stopping GDB.
I have appended the output of the openocd terminal and the output of the gdb
terminal and my addition to tcl/target/stm32f4x.cfg to set the DBGMCU_CR
registers.
Bye
--
Uwe Bonnes b...@elektron.ikp.physik.tu-darmstadt.de
Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
> src/openocd -s tcl -f tcl/board/st_nucleo_f4.cfg
Open On-Chip Debugger 0.9.0-dev-00156-gc0b8e60 (2014-09-25-12:58)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.sourceforge.net/doc/doxygen/bugs.html
Info : The selected transport took over low-level target control. The results
might differ compared to plain JTAG/SWD
adapter speed: 2000 kHz
adapter_nsrst_delay: 100
srst_only separate srst_nogate srst_open_drain connect_deassert_srst
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
Info : clock speed 1800 kHz
Info : STLINK v2 JTAG v23 API v2 SWIM v7 VID 0x0483 PID 0x374B
Info : using stlink api v2
Info : Target voltage: 3.248723
Info : Supported clock speeds are:
Info : 4000 kHz
Info : 1800 kHz
Info : 1200 kHz
Info : 950 kHz
Info : 480 kHz
Info : 240 kHz
Info : 125 kHz
Info : 100 kHz
Info : 50 kHz
Info : 25 kHz
Info : 15 kHz
Info : 5 kHz
Error: jtag status contains invalid mode value - communication failure
Polling target stm32f4x.cpu failed, GDB will be halted. Polling again in 100ms
Info : Previous state query failed, trying to reconnect
Polling target stm32f4x.cpu succeeded again, trying to reexamine
Info : stm32f4x.cpu: hardware has 6 breakpoints, 4 watchpoints
Error: jtag status contains invalid mode value - communication failure
Polling target stm32f4x.cpu failed, GDB will be halted. Polling again in 100ms
Info : Previous state query failed, trying to reconnect
Error: jtag status contains invalid mode value - communication failure
Polling target stm32f4x.cpu failed, GDB will be halted. Polling again in 300ms
Info : Previous state query failed, trying to reconnect
Polling target stm32f4x.cpu succeeded again, trying to reexamine
Info : stm32f4x.cpu: hardware has 6 breakpoints, 4 watchpoints
Error: jtag status contains invalid mode value - communication failure
Polling target stm32f4x.cpu failed, GDB will be halted. Polling again in 100ms
Info : Previous state query failed, trying to reconnect
Polling target stm32f4x.cpu succeeded again, trying to reexamine
Info : stm32f4x.cpu: hardware has 6 breakpoints, 4 watchpoints
Error: jtag status contains invalid mode value - communication failure
Polling target stm32f4x.cpu failed, GDB will be halted. Polling again in 100ms
Info : Previous state query failed, trying to reconnect
Polling target stm32f4x.cpu succeeded again, trying to reexamine
Info : stm32f4x.cpu: hardware has 6 breakpoints, 4 watchpoints
^C
hertz:~/devel/openocd> src/openocd -s tcl -f tcl/board/st_nucleo_f4.cfg
Open On-Chip Debugger 0.9.0-dev-00156-gc0b8e60 (2014-09-25-12:58)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.sourceforge.net/doc/doxygen/bugs.html
Info : The selected transport took over low-level target control. The results
might differ compared to plain JTAG/SWD
adapter speed: 2000 kHz
adapter_nsrst_delay: 100
srst_only separate srst_nogate srst_open_drain connect_deassert_srst
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
Info : clock speed 1800 kHz
Info : STLINK v2 JTAG v23 API v2 SWIM v7 VID 0x0483 PID 0x374B
Info : using stlink api v2
Info : Target voltage: 3.244008
Info : Supported clock speeds are:
Info : 4000 kHz
Info : 1800 kHz
Info : 1200 kHz
Info : 950 kHz
Info : 480 kHz
Info : 240 kHz
Info : 125 kHz
Info : 100 kHz
Info : 50 kHz
Info : 25 kHz
Info : 15 kHz
Info : 5 kHz
Info : stm32f4x.cpu: hardware has 6 breakpoints, 4 watchpoints
Info : accepting 'gdb' connection on tcp/3333
Info : device id = 0x10006431
Warn : STM32 flash size failed, probe inaccurate - assuming 512k flash
Info : flash size = 512kbytes
undefined debug reason 7 - target needs reset
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
adapter speed: 1800 kHz
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x0800009c msp: 0x20000588
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
adapter speed: 1800 kHz
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x0800009c msp: 0x20000588
Info : The target is not running when halt was requested, stopping GDB.
> arm-none-eabi-gdb s_laser_timer.elf
GNU gdb (GNU Tools for ARM Embedded Processors) 7.8.1.20141128-cvs
Copyright (C) 2014 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law. Type "show copying"
and "show warranty" for details.
This GDB was configured as "--host=i686-linux-gnu --target=arm-none-eabi".
Type "show configuration" for configuration details.
For bug reporting instructions, please see:
<http://www.gnu.org/software/gdb/bugs/>.
Find the GDB manual and other documentation resources online at:
<http://www.gnu.org/software/gdb/documentation/>.
For help, type "help".
Type "apropos word" to search for commands related to "word"...
Reading symbols from s_laser_timer.elf...done.
(gdb) tar ext :3333
Remote debugging using :3333
0x00000000 in ?? ()
(gdb) mon reset halt
Unable to match requested speed 2000 kHz, using 1800 kHz
Unable to match requested speed 2000 kHz, using 1800 kHz
adapter speed: 1800 kHz
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x0800009c msp: 0x20000588
(gdb) b NutInit
Breakpoint 1 at 0x80000a0: file
/home/bon/devel/ethernut_sf/nut/os/../arch/cm3/os/nutinit.c, line 259.
(gdb) r
The program being debugged has been started already.
Start it from the beginning? (y or n) y
Starting program:
/devel/ethernut_projects/experimente/schaumann/s_laser_timer/s_laser_timer.elf
Note: automatically using hardware breakpoints for read-only addresses.
^C
diff --git a/tcl/target/stm32f4x.cfg b/tcl/target/stm32f4x.cfg
index faa6a7e..b76a956 100644
--- a/tcl/target/stm32f4x.cfg
+++ b/tcl/target/stm32f4x.cfg
@@ -87,3 +87,33 @@ if {![using_hla]} {
# perform a soft reset
cortex_m reset_config sysresetreq
}
+
+proc stm32f4x_default_reset_start {} {
+ # Reset clock is HSI (16 MHz)
+ adapter_khz 2000
+}
+
+proc stm32f4x_default_examine_end {} {
+ # Enable debug during low power modes (uses more power)
+ mww 0xe0042004 0x00000007 ;# DBGMCU_CR = DBG_STANDBY | DBG_STOP |
DBG_SLEEP
+
+ # Stop watchdog counters during halt
+ mww 0xe0042008 0x00001800 ;# DBGMCU_APB1_FZ = DBG_IWDG_STOP |
DBG_WWDG_STOP
+}
+
+proc stm32f4x_default_reset_init {} {
+ # Configure PLL to boost clock to HSI x 4 (64 MHz)
+ mww 0x40023804 0x08012008 ;# RCC_PLLCFGR 16 Mhz /8 (M) * 128 (N) /4(P)
+ mww 0x40023C00 0x00000102 ;# FLASH_ACR = PRFTBE | 2(Latency)
+ mwh 0x40023802 0x0100 ;# RCC_CR[31:16] = PLLON
+ sleep 10 ;# Wait for PLL to lock
+ mwh 0x40023808 0x0002 ;# RCC_CFGR |= SW[1]
+
+ # Boost JTAG frequency
+ adapter_khz 8000
+}
+
+# Default hooks
+$_TARGETNAME configure -event examine-end { stm32f4x_default_examine_end }
+$_TARGETNAME configure -event reset-start { stm32f4x_default_reset_start }
+$_TARGETNAME configure -event reset-init { stm32f4x_default_reset_init }
commit 1663a17d9d5f5988a8d129a6da36ebcf728d79a2
------------------------------------------------------------------------------
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