This is an automated email from Gerrit.
Mahavir Jain (mj...@marvell.com) just uploaded a new patch set to Gerrit, which
you can find at http://openocd.zylin.com/2553
-- gerrit
commit 1d31016405e060f16da281f507aa15e3bf2c72fa
Author: Mahavir Jain <mj...@marvell.com>
Date: Mon Feb 23 14:19:50 2015 +0530
cfg: add target and interface files for Marvell's 88MC200 Platform
For more information please refer,
https://origin-www.marvell.com/microcontrollers/wi-fi-microcontroller-platform/
Change-Id: Ieb907a7908de18d987baad3514c859a7803e7f93
Signed-off-by: Mahavir Jain <mj...@marvell.com>
diff --git a/tcl/interface/ftdi/mc200.cfg b/tcl/interface/ftdi/mc200.cfg
new file mode 100644
index 0000000..d215883
--- /dev/null
+++ b/tcl/interface/ftdi/mc200.cfg
@@ -0,0 +1,13 @@
+#
+# Marvell's Wireless Microcontroller Platform (88MC200)
+#
+#
https://origin-www.marvell.com/microcontrollers/wi-fi-microcontroller-platform/
+#
+
+interface ftdi
+ftdi_device_desc "Dual RS232"
+ftdi_vid_pid 0x0403 0x6010
+
+ftdi_layout_init 0x0508 0x0f1b
+ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100
+ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400
diff --git a/tcl/target/mc200.cfg b/tcl/target/mc200.cfg
new file mode 100644
index 0000000..2acb03e
--- /dev/null
+++ b/tcl/target/mc200.cfg
@@ -0,0 +1,54 @@
+#
+# Marvell's Wireless Microcontroller Platform (88MC200)
+#
+#
https://origin-www.marvell.com/microcontrollers/wi-fi-microcontroller-platform/
+#
+
+source [find interface/ftdi/mc200.cfg]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME mc200
+}
+
+set _ENDIAN little
+
+# Work-area is a space in RAM used for flash programming
+# By default use 16kB
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x4000
+}
+
+# JTAG scan chain
+if { [info exists CPUTAPID ] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x4ba00477
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id
$_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position
$_TARGETNAME
+$_TARGETNAME configure -work-area-phys 0x2001C000 -work-area-size
$_WORKAREASIZE -work-area-backup 0
+
+# Flash bank
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME mrvlqspi 0x0 0 0 0 $_TARGETNAME 0x46010000
+
+# JTAG speed should be <= F_CPU/6. F_CPU after reset is 32MHz
+# so use F_JTAG = 3MHz
+adapter_khz 3000
+adapter_nsrst_delay 100
+if {[using_jtag]} {
+ jtag_ntrst_delay 100
+}
+
+if {![using_hla]} {
+ # if srst is not fitted use SYSRESETREQ to
+ # perform a soft reset
+ cortex_m reset_config sysresetreq
+}
--
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