This is an automated email from Gerrit.
Paul Fertser (fercer...@gmail.com) just uploaded a new patch set to Gerrit,
which you can find at http://openocd.zylin.com/2596
-- gerrit
commit df06035b4afb5752a4484abcd0e6d241edc4e03d
Author: Paul Fertser <fercer...@gmail.com>
Date: Wed Mar 11 11:33:55 2015 +0300
target/adi_v5_swd, cortex_m: properly handle more cases requiring reconnect
This brings SWD reconnection procedure in line with the ARM
documentation and changes cortex_m reset procedure to make use of it.
The motivation behind this patch is to make SAM4L "reset" and "reset
halt" properly without SRST. The complication here is that EDBG issues
an additional read of DP_RDBUFF automatically right after writing
SYSRESETREQ, that leads to a FAULT which needs to be dealt with
properly. With this patch the very first ahbap_debugport_init DAP
access will make SWD layer properly reinitialise the link before
continuing.
Change-Id: Ic506f9db30931dfa60860036b83f73b897975909
Signed-off-by: Paul Fertser <fercer...@gmail.com>
diff --git a/src/target/adi_v5_swd.c b/src/target/adi_v5_swd.c
index 1827c59..2cb61f8 100644
--- a/src/target/adi_v5_swd.c
+++ b/src/target/adi_v5_swd.c
@@ -112,6 +112,8 @@ static int swd_connect(struct adiv5_dap *dap)
/* Note, debugport_init() does setup too */
jtag_interface->swd->switch_seq(dap, JTAG_TO_SWD);
+ dap->do_reconnect = false;
+
swd_queue_dp_read(dap, DP_IDCODE, &idcode);
/* force clear all sticky faults */
@@ -122,7 +124,8 @@ static int swd_connect(struct adiv5_dap *dap)
if (status == ERROR_OK) {
LOG_INFO("SWD IDCODE %#8.8" PRIx32, idcode);
dap->do_reconnect = false;
- }
+ } else
+ dap->do_reconnect = true;
return status;
}
@@ -132,6 +135,14 @@ static inline int check_sync(struct adiv5_dap *dap)
return do_sync ? swd_run_inner(dap) : ERROR_OK;
}
+static int swd_check_reconnect(struct adiv5_dap *dap)
+{
+ if (dap->do_reconnect)
+ return swd_connect(dap);
+
+ return ERROR_OK;
+}
+
static int swd_queue_ap_abort(struct adiv5_dap *dap, uint8_t *ack)
{
const struct swd_driver *swd = jtag_interface->swd;
@@ -165,6 +176,10 @@ static int swd_queue_dp_read(struct adiv5_dap *dap,
unsigned reg,
const struct swd_driver *swd = jtag_interface->swd;
assert(swd);
+ int retval = swd_check_reconnect(dap);
+ if (retval != ERROR_OK)
+ return retval;
+
swd_queue_dp_bankselect(dap, reg);
swd->read_reg(dap, swd_cmd(true, false, reg), data);
@@ -177,6 +192,10 @@ static int swd_queue_dp_write(struct adiv5_dap *dap,
unsigned reg,
const struct swd_driver *swd = jtag_interface->swd;
assert(swd);
+ int retval = swd_check_reconnect(dap);
+ if (retval != ERROR_OK)
+ return retval;
+
swd_finish_read(dap);
swd_queue_dp_bankselect(dap, reg);
swd->write_reg(dap, swd_cmd(false, false, reg), data);
@@ -204,11 +223,9 @@ static int swd_queue_ap_read(struct adiv5_dap *dap,
unsigned reg,
const struct swd_driver *swd = jtag_interface->swd;
assert(swd);
- if (dap->do_reconnect) {
- int retval = swd_connect(dap);
- if (retval != ERROR_OK)
- return retval;
- }
+ int retval = swd_check_reconnect(dap);
+ if (retval != ERROR_OK)
+ return retval;
swd_queue_ap_bankselect(dap, reg);
swd->read_reg(dap, swd_cmd(true, true, reg), dap->last_read);
@@ -223,6 +240,10 @@ static int swd_queue_ap_write(struct adiv5_dap *dap,
unsigned reg,
const struct swd_driver *swd = jtag_interface->swd;
assert(swd);
+ int retval = swd_check_reconnect(dap);
+ if (retval != ERROR_OK)
+ return retval;
+
swd_finish_read(dap);
swd_queue_ap_bankselect(dap, reg);
swd->write_reg(dap, swd_cmd(false, true, reg), data);
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index d3b8f4e..bf0513e 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1052,12 +1052,6 @@ static int cortex_m_assert_reset(struct target *target)
* This has the disadvantage of not resetting the peripherals,
so a
* reset-init event handler is needed to perform any peripheral
resets.
*/
- retval = mem_ap_write_atomic_u32(swjdp, NVIC_AIRCR,
- AIRCR_VECTKEY | ((reset_config ==
CORTEX_M_RESET_SYSRESETREQ)
- ? AIRCR_SYSRESETREQ : AIRCR_VECTRESET));
- if (retval != ERROR_OK)
- return retval;
-
LOG_DEBUG("Using Cortex-M %s", (reset_config ==
CORTEX_M_RESET_SYSRESETREQ)
? "SYSRESETREQ" : "VECTRESET");
@@ -1066,16 +1060,15 @@ static int cortex_m_assert_reset(struct target *target)
"handler to reset any peripherals or configure
hardware srst support.");
}
- /*
- SAM4L needs to execute security initalization
- startup sequence before AP access would be enabled.
- During the intialization CDBGPWRUPACK is pulled low and we
- need to wait for it to be set to 1 again.
- */
- retval = dap_dp_poll_register(swjdp, DP_CTRL_STAT,
- CDBGPWRUPACK, CDBGPWRUPACK, 100);
+ retval = mem_ap_write_atomic_u32(swjdp, NVIC_AIRCR,
+ AIRCR_VECTKEY | ((reset_config ==
CORTEX_M_RESET_SYSRESETREQ)
+ ? AIRCR_SYSRESETREQ : AIRCR_VECTRESET));
+ if (retval != ERROR_OK)
+ LOG_DEBUG("Ignoring AP write error right after reset");
+
+ retval = ahbap_debugport_init(swjdp);
if (retval != ERROR_OK) {
- LOG_ERROR("Failed waitnig for CDBGPWRUPACK");
+ LOG_ERROR("DP initialisation failed");
return ERROR_FAIL;
}
--
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