This is an automated email from Gerrit.

Matthias Welwarsky ([email protected]) just uploaded a new patch set to 
Gerrit, which you can find at http://openocd.zylin.com/3077

-- gerrit

commit 59586c2de5020ee4ecb3512ac29b283cbcb6e6e2
Author: Matthias Welwarsky <[email protected]>
Date:   Thu Oct 29 11:14:50 2015 +0100

    armv7a: Add branch predictor flush to i-cache invalidate
    
    After invalidating the i-cache, branch predictor must
    be manually flushed, too.
    
    Change-Id: I0749f129fa74e04f4e9c20d143a744f09ef750d8
    Signed-off-by: Matthias Welwarsky <[email protected]>

diff --git a/src/target/armv7a_cache.c b/src/target/armv7a_cache.c
index 167dd68..db0b18a 100644
--- a/src/target/armv7a_cache.c
+++ b/src/target/armv7a_cache.c
@@ -285,14 +285,15 @@ done:
        return retval;
 }
 
-static int armv7a_l1_i_cache_inval_virt(struct target *target, uint32_t virt,
+int armv7a_l1_i_cache_inval_virt(struct target *target, uint32_t virt,
                                        uint32_t size)
 {
        struct armv7a_common *armv7a = target_to_armv7a(target);
        struct arm_dpm *dpm = armv7a->arm.dpm;
        struct armv7a_cache_common *armv7a_cache =
                                &armv7a->armv7a_mmu.armv7a_cache;
-       uint32_t i, linelen = armv7a_cache->iminline;
+       uint32_t linelen = armv7a_cache->iminline;
+       uint32_t va_line, va_end;
        int retval;
 
        retval = armv7a_l1_i_cache_sanity_check(target);
@@ -303,15 +304,21 @@ static int armv7a_l1_i_cache_inval_virt(struct target 
*target, uint32_t virt,
        if (retval != ERROR_OK)
                goto done;
 
-       for (i = 0; i < size; i += linelen) {
-               uint32_t offs = virt + i;
+       va_line = virt & (-linelen);
+       va_end = virt + size;
 
+       while (va_line < va_end) {
                /* ICIMVAU - Invalidate instruction cache by VA to PoU. */
-               /* FIXME: is this instruction enough? */
                retval = dpm->instr_write_data_r0(dpm,
-                               ARMV4_5_MCR(15, 0, 0, 7, 5, 1), offs);
+                               ARMV4_5_MCR(15, 0, 0, 7, 5, 1), va_line);
                if (retval != ERROR_OK)
                        goto done;
+               /* BPIMVA */
+               retval = dpm->instr_write_data_r0(dpm,
+                               ARMV4_5_MCR(15, 0, 0, 7, 5, 7), va_line);
+               if (retval != ERROR_OK)
+                       goto done;
+               va_line += linelen;
        }
        return retval;
 
diff --git a/src/target/armv7a_cache.h b/src/target/armv7a_cache.h
index a02accf..1674206 100644
--- a/src/target/armv7a_cache.h
+++ b/src/target/armv7a_cache.h
@@ -24,6 +24,8 @@ int armv7a_l1_d_cache_clean_virt(struct target *target, 
uint32_t virt,
 int armv7a_l1_d_cache_flush_virt(struct target *target, uint32_t virt,
                                        unsigned int size);
 int armv7a_l1_i_cache_inval_all(struct target *target);
+int armv7a_l1_i_cache_inval_virt(struct target *target, uint32_t virt,
+                                       uint32_t size);
 int armv7a_di_cache_clean_inval_virt(struct target *target, uint32_t virt,
                                        unsigned int size);
 int armv7a_cache_auto_flush_on_write(struct target *target, uint32_t virt,

-- 

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