This is an automated email from Gerrit.

Matthias Welwarsky ([email protected]) just uploaded a new patch set to 
Gerrit, which you can find at http://openocd.zylin.com/3358

-- gerrit

commit d27feedca3e4aa106819bb36e9cf95e2fad8118e
Author: Matthias Welwarsky <[email protected]>
Date:   Wed Feb 17 17:41:16 2016 +0100

    board: add configuration for ZII RDU2 board
    
    Custom board based on IMX6Q by Zodiac Inflight Innovations
    
    Change-Id: Id1e2ef6feb903b6caef91874187003feea13e980
    Signed-off-by: Matthias Welwarsky <[email protected]>

diff --git a/tcl/board/zii-rdu2-with-dcd.cfg b/tcl/board/zii-rdu2-with-dcd.cfg
new file mode 100644
index 0000000..5bff372
--- /dev/null
+++ b/tcl/board/zii-rdu2-with-dcd.cfg
@@ -0,0 +1,151 @@
+#
+# Board configuration file for the Zodiac IMX6Q RDU2
+#
+# This board has an embedded FTDI JTAG
+interface ftdi
+ftdi_vid_pid 0x0403 0x6011
+
+ftdi_layout_init 0x0038 0x003b
+ftdi_layout_signal nSRST -data 0x0010
+ftdi_layout_signal LED -data 0x0020
+
+# the only possible transport is JTAG
+transport select jtag
+
+# embedded adapter can do 20MHz JTAG clock
+adapter_khz 20000
+
+# FIXME: reset configuration is really srst_only and push/pull?
+reset_config srst_only srst_push_pull
+
+# iMX6Q POR gates JTAG and the chip is completely incommunicado
+# over JTAG for at least 10ms after nSRST is deasserted
+adapter_nsrst_delay 11
+
+# Source generic iMX6Q target configuration
+set CHIPNAME imx6q
+source [find target/imx6.cfg]
+
+# include the mem access helpers
+source [find mem_helper.tcl]
+
+# function to disable the on-chip watchdog
+proc zii_rdu2_disable_wdog { } {
+       mwh phys 0x020bc000 0x30
+}
+
+proc zii_rdu2_apply_dcd { } {
+       echo "Applying DCD..."
+
+       mww phys 0x020e0798 0x000C0000
+       mww phys 0x020e0758 0x00000000
+       mww phys 0x020e0588 0x00000030
+       mww phys 0x020e0594 0x00000030
+       mww phys 0x020e056c 0x00000030
+       mww phys 0x020e0578 0x00000030
+       mww phys 0x020e074c 0x00000030
+       mww phys 0x020e057c 0x00000030
+       mww phys 0x020e058c 0x00000000
+       mww phys 0x020e059c 0x00000030
+       mww phys 0x020e05a0 0x00000030
+       mww phys 0x020e078c 0x00000030
+       mww phys 0x020e0750 0x00020000
+       mww phys 0x020e05a8 0x00000028
+       mww phys 0x020e05b0 0x00000028
+       mww phys 0x020e0524 0x00000028
+       mww phys 0x020e051c 0x00000028
+       mww phys 0x020e0518 0x00000028
+       mww phys 0x020e050c 0x00000028
+       mww phys 0x020e05b8 0x00000028
+       mww phys 0x020e05c0 0x00000028
+       mww phys 0x020e0774 0x00020000
+       mww phys 0x020e0784 0x00000028
+       mww phys 0x020e0788 0x00000028
+       mww phys 0x020e0794 0x00000028
+       mww phys 0x020e079c 0x00000028
+       mww phys 0x020e07a0 0x00000028
+       mww phys 0x020e07a4 0x00000028
+       mww phys 0x020e07a8 0x00000028
+       mww phys 0x020e0748 0x00000028
+       mww phys 0x020e05ac 0x00000028
+       mww phys 0x020e05b4 0x00000028
+       mww phys 0x020e0528 0x00000028
+       mww phys 0x020e0520 0x00000028
+       mww phys 0x020e0514 0x00000028
+       mww phys 0x020e0510 0x00000028
+       mww phys 0x020e05bc 0x00000028
+       mww phys 0x020e05c4 0x00000028
+       mww phys 0x021b0800 0xa1390003
+       mww phys 0x021b080c 0x001F001F
+       mww phys 0x021b0810 0x001F001F
+       mww phys 0x021b480c 0x001F001F
+       mww phys 0x021b4810 0x001F001F
+       mww phys 0x021b083c 0x43260335
+       mww phys 0x021b0840 0x031A030B
+       mww phys 0x021b483c 0x4323033B
+       mww phys 0x021b4840 0x0323026F
+       mww phys 0x021b0848 0x483D4545
+       mww phys 0x021b4848 0x44433E48
+       mww phys 0x021b0850 0x41444840
+       mww phys 0x021b4850 0x4835483E
+       mww phys 0x021b081c 0x33333333
+       mww phys 0x021b0820 0x33333333
+       mww phys 0x021b0824 0x33333333
+       mww phys 0x021b0828 0x33333333
+       mww phys 0x021b481c 0x33333333
+       mww phys 0x021b4820 0x33333333
+       mww phys 0x021b4824 0x33333333
+       mww phys 0x021b4828 0x33333333
+       mww phys 0x021b08b8 0x00000800
+       mww phys 0x021b48b8 0x00000800
+       mww phys 0x021b0004 0x00020036
+       mww phys 0x021b0008 0x09444040
+       mww phys 0x021b000c 0x8A8F7955
+       mww phys 0x021b0010 0xFF328F64
+       mww phys 0x021b0014 0x01FF00DB
+       mww phys 0x021b0018 0x00001740
+       mww phys 0x021b001c 0x00008000
+       mww phys 0x021b002c 0x000026d2
+       mww phys 0x021b0030 0x008F1023
+       mww phys 0x021b0040 0x00000047
+       mww phys 0x021b0000 0x841A0000
+       mww phys 0x021b001c 0x04088032
+       mww phys 0x021b001c 0x00008033
+       mww phys 0x021b001c 0x00048031
+       mww phys 0x021b001c 0x09408030
+       mww phys 0x021b001c 0x04008040
+       mww phys 0x021b0020 0x00005800
+       mww phys 0x021b0818 0x00011117
+       mww phys 0x021b4818 0x00011117
+       mww phys 0x021b0004 0x00025576
+       mww phys 0x021b0404 0x00011006
+       mww phys 0x021b001c 0x00000000
+
+       # set the default clock gate to save power
+       mww phys 0x020c4068 0x00C03F3F
+       mww phys 0x020c406c 0x0030FC03
+       mww phys 0x020c4070 0x0FFFC000
+       mww phys 0x020c4074 0x3FF00000
+       mww phys 0x020c4078 0xFFFFF300
+       mww phys 0x020c407c 0x0F0000F3
+       mww phys 0x020c4080 0x00000FFF
+
+       # enable AXI cache for VDOA/VPU/IPU
+       mww phys 0x020e0010 0xF00000CF
+       # set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7
+       mww phys 0x020e0018 0x007F007F
+       mww phys 0x020e001c 0x007F007F
+}
+
+proc zii_rdu2_init { } {
+       echo "Reset-init..."
+       zii_rdu2_disable_wdog
+       zii_rdu2_apply_dcd
+       # arm semihosting on
+}
+
+# hook the init function into the reset-init event
+$_TARGETNAME.0 configure -event reset-init { zii_rdu2_init }
+# override the default gdb-attach handler to reset-init the board
+# each time gdb is attached
+$_TARGETNAME.0 configure -event gdb-attach { reset init }

-- 

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