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Cezary Gapiński ([email protected]) just uploaded a new patch set to 
Gerrit, which you can find at http://openocd.zylin.com/4074

-- gerrit

commit c0ba93cbc9eb9daec2401a50f74dbc22f4843d8f
Author: CezaryGapinski <[email protected]>
Date:   Mon Mar 20 12:33:05 2017 +0100

    stm32lx: fix dual-bank configuration for Cat.5 and Cat.6 devices
    
    Default values for .first_bank_size_kb and .has_dual_banks fields described 
in stm32lx_parts [] do not fully describe the real device memory layouts.
    
    Basing on:
    STM32L0x1 RM0377
    STM32L0x2 RM0376
    STM32L0x3 RM0367
    STM32Lxxxx RM0038
    
    correct values for memory layouts were selected:
    id = 0x447 STM32L0xx (Cat.5) <- dual bank flash for size 192 or 128 KBytes, 
single bank for 64 KBytes
    id = 0x436 STM32L1xx (Cat.4 / Cat.3 - Medium + / High Density) <- only one 
size of the bank, default values are correct
    id = 0x437 STM32L1xx (Cat.5 / Cat.6) <- always dual bank, but size of the 
bank can be different
    
    For that reason .part_info field in struct stm32lx_flash_bank is a dynamic 
field with fields copied from stm32lx_parts [] and overwrited to correct values 
for specific chips and memory sizes.
    
    Change-Id: If638cb0a9916097bfd4eda77d64feaf1ef2d2147
    Signed-off-by: Cezary Gapiński <[email protected]>

diff --git a/src/flash/nor/stm32lx.c b/src/flash/nor/stm32lx.c
index 0b39233..1dc3e51 100644
--- a/src/flash/nor/stm32lx.c
+++ b/src/flash/nor/stm32lx.c
@@ -132,7 +132,7 @@ struct stm32lx_flash_bank {
        uint32_t user_bank_size;
        uint32_t flash_base;
 
-       const struct stm32lx_part_info *part_info;
+       struct stm32lx_part_info part_info;
 };
 
 static const struct stm32lx_rev stm32_416_revs[] = {
@@ -436,7 +436,7 @@ static int stm32lx_write_half_pages(struct flash_bank 
*bank, const uint8_t *buff
        struct target *target = bank->target;
        struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
 
-       uint32_t hp_nb = stm32lx_info->part_info->page_size / 2;
+       uint32_t hp_nb = stm32lx_info->part_info.page_size / 2;
        uint32_t buffer_size = 16384;
        struct working_area *write_algorithm;
        struct working_area *source;
@@ -495,7 +495,7 @@ static int stm32lx_write_half_pages(struct flash_bank 
*bank, const uint8_t *buff
                else
                        buffer_size /= 2;
 
-               if (buffer_size <= stm32lx_info->part_info->page_size) {
+               if (buffer_size <= stm32lx_info->part_info.page_size) {
                        /* we already allocated the writing code, but failed to 
get a
                         * buffer, free the algorithm */
                        target_free_working_area(target, write_algorithm);
@@ -629,7 +629,7 @@ static int stm32lx_write(struct flash_bank *bank, const 
uint8_t *buffer,
        struct target *target = bank->target;
        struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
 
-       uint32_t hp_nb = stm32lx_info->part_info->page_size / 2;
+       uint32_t hp_nb = stm32lx_info->part_info.page_size / 2;
        uint32_t halfpages_number;
        uint32_t bytes_remaining = 0;
        uint32_t address = bank->base + offset;
@@ -759,9 +759,9 @@ static int stm32lx_probe(struct flash_bank *bank)
        uint32_t device_id;
        uint32_t base_address = FLASH_BANK0_ADDRESS;
        uint32_t second_bank_base;
+       unsigned int n;
 
        stm32lx_info->probed = 0;
-       stm32lx_info->part_info = NULL;
 
        int retval = stm32lx_read_id_code(bank->target, &device_id);
        if (retval != ERROR_OK)
@@ -771,22 +771,24 @@ static int stm32lx_probe(struct flash_bank *bank)
 
        LOG_DEBUG("device id = 0x%08" PRIx32 "", device_id);
 
-       for (unsigned int n = 0; n < ARRAY_SIZE(stm32lx_parts); n++) {
-               if ((device_id & 0xfff) == stm32lx_parts[n].id)
-                       stm32lx_info->part_info = &stm32lx_parts[n];
+       for (n = 0; n < ARRAY_SIZE(stm32lx_parts); n++) {
+               if ((device_id & 0xfff) == stm32lx_parts[n].id) {
+                       memcpy(&stm32lx_info->part_info, &stm32lx_parts[n], 
sizeof(stm32lx_info->part_info));
+                       break;
+               }
        }
 
-       if (!stm32lx_info->part_info) {
+       if (n == ARRAY_SIZE(stm32lx_parts)) {
                LOG_WARNING("Cannot identify target as a STM32L family.");
                return ERROR_FAIL;
        } else {
-               LOG_INFO("Device: %s", stm32lx_info->part_info->device_str);
+               LOG_INFO("Device: %s", stm32lx_info->part_info.device_str);
        }
 
-       stm32lx_info->flash_base = stm32lx_info->part_info->flash_base;
+       stm32lx_info->flash_base = stm32lx_info->part_info.flash_base;
 
        /* Get the flash size from target. */
-       retval = target_read_u16(target, stm32lx_info->part_info->fsize_base,
+       retval = target_read_u16(target, stm32lx_info->part_info.fsize_base,
                        &flash_size_in_kb);
 
        /* 0x436 devices report their flash size as a 0 or 1 code indicating 
384K
@@ -803,29 +805,47 @@ static int stm32lx_probe(struct flash_bank *bank)
         * default to max target family */
        if (retval != ERROR_OK || flash_size_in_kb == 0xffff || 
flash_size_in_kb == 0) {
                LOG_WARNING("STM32L flash size failed, probe inaccurate - 
assuming %dk flash",
-                       stm32lx_info->part_info->max_flash_size_kb);
-               flash_size_in_kb = stm32lx_info->part_info->max_flash_size_kb;
-       } else if (flash_size_in_kb > 
stm32lx_info->part_info->max_flash_size_kb) {
+                       stm32lx_info->part_info.max_flash_size_kb);
+               flash_size_in_kb = stm32lx_info->part_info.max_flash_size_kb;
+       } else if (flash_size_in_kb > 
stm32lx_info->part_info.max_flash_size_kb) {
                LOG_WARNING("STM32L probed flash size assumed incorrect since 
FLASH_SIZE=%dk > %dk, - assuming %dk flash",
-                       flash_size_in_kb, 
stm32lx_info->part_info->max_flash_size_kb,
-                       stm32lx_info->part_info->max_flash_size_kb);
-               flash_size_in_kb = stm32lx_info->part_info->max_flash_size_kb;
+                       flash_size_in_kb, 
stm32lx_info->part_info.max_flash_size_kb,
+                       stm32lx_info->part_info.max_flash_size_kb);
+               flash_size_in_kb = stm32lx_info->part_info.max_flash_size_kb;
+       }
+
+       /* Overwrite default dual-bank configuration */
+       switch (device_id & 0xfff) {
+       case 0x447: /* STM32L0xx (Cat.5) devices */
+               switch (flash_size_in_kb) {
+               case 192:
+               case 128:
+                       stm32lx_info->part_info.first_bank_size_kb = 
flash_size_in_kb / 2;
+                       break;
+               case 64:
+                       stm32lx_info->part_info.has_dual_banks = false;
+                       break;
+               }
+               break;
+       case 0x437: /* STM32L1xx (Cat.5/Cat.6) */
+               stm32lx_info->part_info.first_bank_size_kb = flash_size_in_kb / 
2;
+               break;
        }
 
-       if (stm32lx_info->part_info->has_dual_banks) {
+       if (stm32lx_info->part_info.has_dual_banks) {
                /* Use the configured base address to determine if this is the 
first or second flash bank.
                 * Verify that the base address is reasonably correct and 
determine the flash bank size
                 */
                second_bank_base = base_address +
-                       stm32lx_info->part_info->first_bank_size_kb * 1024;
+                       stm32lx_info->part_info.first_bank_size_kb * 1024;
                if (bank->base == second_bank_base || !bank->base) {
                        /* This is the second bank  */
                        base_address = second_bank_base;
                        flash_size_in_kb = flash_size_in_kb -
-                               stm32lx_info->part_info->first_bank_size_kb;
+                               stm32lx_info->part_info.first_bank_size_kb;
                } else if (bank->base == base_address) {
                        /* This is the first bank */
-                       flash_size_in_kb = 
stm32lx_info->part_info->first_bank_size_kb;
+                       flash_size_in_kb = 
stm32lx_info->part_info.first_bank_size_kb;
                } else {
                        LOG_WARNING("STM32L flash bank base address config is 
incorrect."
                                    " 0x%" PRIx32 " but should rather be 0x%" 
PRIx32 " or 0x%" PRIx32,
@@ -898,7 +918,7 @@ static int stm32lx_get_info(struct flash_bank *bank, char 
*buf, int buf_size)
                }
        }
 
-       const struct stm32lx_part_info *info = stm32lx_info->part_info;
+       const struct stm32lx_part_info *info = &stm32lx_info->part_info;
 
        if (info) {
                const char *rev_str = NULL;
@@ -911,11 +931,11 @@ static int stm32lx_get_info(struct flash_bank *bank, char 
*buf, int buf_size)
                if (rev_str != NULL) {
                        snprintf(buf, buf_size,
                                "%s - Rev: %s",
-                               stm32lx_info->part_info->device_str, rev_str);
+                               stm32lx_info->part_info.device_str, rev_str);
                } else {
                        snprintf(buf, buf_size,
                                "%s - Rev: unknown (0x%04x)",
-                               stm32lx_info->part_info->device_str, rev_id);
+                               stm32lx_info->part_info.device_str, rev_id);
                }
 
                return ERROR_OK;
@@ -1132,7 +1152,7 @@ static int stm32lx_erase_sector(struct flash_bank *bank, 
int sector)
        if (retval != ERROR_OK)
                return retval;
 
-       for (int page = 0; page < 
(int)stm32lx_info->part_info->pages_per_sector;
+       for (int page = 0; page < (int)stm32lx_info->part_info.pages_per_sector;
                        page++) {
                reg32 = FLASH_PECR__PROG | FLASH_PECR__ERASE;
                retval = target_write_u32(target,
@@ -1145,7 +1165,7 @@ static int stm32lx_erase_sector(struct flash_bank *bank, 
int sector)
                        return retval;
 
                uint32_t addr = bank->base + bank->sectors[sector].offset + 
(page
-                               * stm32lx_info->part_info->page_size);
+                               * stm32lx_info->part_info.page_size);
                retval = target_write_u32(target, addr, 0x0);
                if (retval != ERROR_OK)
                        return retval;

-- 

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