This is an automated email from Gerrit. Tarek BOCHKATI (tarek.bouchk...@gmail.com) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/5517
-- gerrit commit 829ecc72dc656b7494d370e61be1098f52e0d5ff Author: Tarek BOCHKATI <tarek.bouchk...@gmail.com> Date: Fri Mar 13 12:25:03 2020 +0100 armv8: don't throw an error for unsupported ESR_EL3 access in AArch32 state In ARMv8-A ARM (DDI 0487F.a), chapters D13.2.36 to D13.2.38: ESR_EL1 and ESR_EL2 are mapper respectively to DFSR and HSR but there is no mention if ESR_EL3 are mapped to an AArch32 register which explain the current situation/ In this change we added a warning logged for each access to ESR_EL3 and avoided to report an error in order to avoid failure in polling causing to reexamine the target and re-execute examine-start and -end without real need. Note: some ARMv8-A processors TRM (like A53 and A35) indicates that ESR_EL1 is mapped to DFSR(NS) and ESR_EL3 is mapped to DFSR(S) but we don't know if this applies to all ARMv8-A processors. a support case is opened with ARM and we are waiting for their help. Change-Id: I9e0367bd9a26c5b4cbb23ff9c64abbe79f0cbd62 Signed-off-by: Tarek BOCHKATI <tarek.bouchk...@gmail.com> diff --git a/src/target/armv8.c b/src/target/armv8.c index 88b9320..0892507 100644 --- a/src/target/armv8.c +++ b/src/target/armv8.c @@ -399,7 +399,10 @@ static int armv8_read_reg32(struct armv8_common *armv8, int regnum, uint64_t *re &value); break; case ARMV8_ESR_EL3: /* FIXME: no equivalent in aarch32? */ - retval = ERROR_FAIL; + /* avoid false errors in state polling which may lead to reexamine the + * target and re-execute examine-state and examine-end event handlers */ + LOG_WARNING("Unsupported read from ESR_EL3 in AArch32 state"); + retval = ERROR_OK; break; case ARMV8_SPSR_EL1: /* mapped to SPSR_svc */ retval = dpm->instr_read_data_r0(dpm, @@ -533,7 +536,10 @@ static int armv8_write_reg32(struct armv8_common *armv8, int regnum, uint64_t va value); break; case ARMV8_ESR_EL3: /* FIXME: no equivalent in aarch32? */ - retval = ERROR_FAIL; + /* avoid false errors in state polling which may lead to reexamine the + * target and re-execute examine-state and examine-end event handlers */ + LOG_WARNING("Unsupported write to ESR_EL3 in AArch32 state"); + retval = ERROR_OK; break; case ARMV8_SPSR_EL1: /* mapped to SPSR_svc */ retval = dpm->instr_write_data_r0(dpm, -- _______________________________________________ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel