This is an automated email from Gerrit.

Oleksandr Kozaruk (alkho...@gmail.com) just uploaded a new patch set to Gerrit, 
which you can find at http://openocd.zylin.com/5534

-- gerrit

commit 38be18e739bd17412120e673e6fee36c3d9400d5
Author: Sasha Kozaruk <okoza...@apple.com>
Date:   Thu Mar 19 18:53:24 2020 -0700

    flash/stm32h7x: Use proper flash regs base for bank 1
    
    On stm32h747 writing/erasing bank 1 didn't work. It was because the
    flash register base was always set for bank 0.
    Tested on STM32H747I-DISCO board.
    
    Change-Id: I7e8c43ecdda9dc70b114905f5ec6a6753ca29d82
    Signed-off-by: Sasha Kozaruk <alkho...@gmail.com>

diff --git a/src/flash/nor/stm32h7x.c b/src/flash/nor/stm32h7x.c
index 6edbc00..5f904e5 100644
--- a/src/flash/nor/stm32h7x.c
+++ b/src/flash/nor/stm32h7x.c
@@ -118,7 +118,7 @@ struct stm32h7x_part_info {
        uint16_t max_flash_size_kb;
        uint8_t has_dual_bank;
        uint16_t max_bank_size_kb; /* Used when has_dual_bank is true */
-       uint32_t flash_regs_base;    /* Flash controller registers location */
+       uint32_t flash_regs_base[2];    /* Flash controller registers location 
*/
        uint32_t fsize_addr;         /* Location of FSIZE register */
        uint32_t wps_group_size; /* write protection group sectors' count */
        uint32_t wps_mask;
@@ -175,7 +175,8 @@ static const struct stm32h7x_part_info stm32h7x_parts[] = {
        .max_flash_size_kb      = 2048,
        .max_bank_size_kb       = 1024,
        .has_dual_bank          = 1,
-       .flash_regs_base        = FLASH_REG_BASE_B0,
+       .flash_regs_base[0]     = FLASH_REG_BASE_B0,
+       .flash_regs_base[1]     = FLASH_REG_BASE_B1,
        .fsize_addr                     = 0x1FF1E880,
        .wps_group_size         = 1,
        .wps_mask                       = 0xFF,
@@ -191,7 +192,8 @@ static const struct stm32h7x_part_info stm32h7x_parts[] = {
        .max_flash_size_kb      = 2048,
        .max_bank_size_kb       = 1024,
        .has_dual_bank          = 1,
-       .flash_regs_base        = FLASH_REG_BASE_B0,
+       .flash_regs_base[0]     = FLASH_REG_BASE_B0,
+       .flash_regs_base[1]     = FLASH_REG_BASE_B1,
        .fsize_addr                     = 0x08FFF80C,
        .wps_group_size         = 4,
        .wps_mask                       = 0xFFFFFFFF,
@@ -764,7 +766,9 @@ static int stm32x_probe(struct flash_bank *bank)
        }
 
        /* update the address of controller from data base */
-       stm32x_info->flash_regs_base = stm32x_info->part_info->flash_regs_base;
+       stm32x_info->flash_regs_base = 
stm32x_info->part_info->flash_regs_base[bank->bank_number];
+
+       LOG_INFO("flash_regs_base: 0x%x", stm32x_info->flash_regs_base);
 
        /* get flash size from target */
        retval = target_read_u16(target, stm32x_info->part_info->fsize_addr, 
&flash_size_in_kb);

-- 


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