> On 26 Jul 2023, at 12:47, Tommy Murphy <tommy_mur...@hotmail.com> wrote:
>
> Hi Liviu - could you perhaps clarify - maybe in pseudo code - what you mean
> by a "rogue breakpoint"? The exact nature of what you mean by this is still
> unclear to me.
If the source of the breakpoint cannot be identified, it is probably not legit.
BKPT instructions can obviously be identified, thus are legit.
Breakpoints triggered by matched conditions (like the FPB registers) are also
legit.
If no such known condition can be identified and checked by OpenOCD, the
breakpoint is probably rogue, and, at least when not in a debug session,
can/should be resumed.
I agree that this is not a normal condition, but a safety net for buggy cores,
like Cortex-M7.
Without such a workaround, using OpenOCD for running standalone semihosted
unit-tests on STM32F7 & H7 is currently not possible; for me, this is an
annoying setback, I have to limit myself to STM32F4.
Liviu
