[PATCH]: 44ac502dac target/cortex_m: support Infineon Cortex-M33 from SLx2 MCU

[gerrit]

This is an automated email from Gerrit.

"Name of user not set <boughanmi.exter...@infineon.com>" just uploaded a new 
patch set to Gerrit, which you can find at 
https://review.openocd.org/c/openocd/+/7879

-- gerrit

commit 44ac502dacf8f04476941944603aceacad8cf6ff
Author: Ahmed Boughanmi <boughanmi.exter...@infineon.com>
Date:   Wed Aug 30 02:26:40 2023 +0200

    target/cortex_m: support Infineon Cortex-M33 from SLx2 MCU
    
    The secure microcontroller Infineon SLx2 uses a custom Cortex-M33.
    The register CPUID reports value 0x490FDB00.
    
    Link: 
https://www.infineon.com/cms/en/about-infineon/press/market-news/2022/INFCSS202211-034.html
    
    Change-Id: Ib242f525a0c525e7c1c8f43d8e67e987c80f2317
    
    Change-Id: I8911712c55bd50e24ed53cf49958352f470027a5
    Signed-off-by: Ahmed boughanmi <boughanmi.exter...@infineon.com>

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 014ceaebaa..63c236b072 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -93,6 +93,11 @@ static const struct cortex_m_part_info cortex_m_parts[] = {
                .arch = ARM_ARCH_V8M,
                .flags = CORTEX_M_F_HAS_FPV5,
        },
+       {
+               .partno = INFINEON_SLX2_PARTNO,
+               .name = "Infineon-Slx2",
+               .arch = ARM_ARCH_V8M,
+       },
        {
                .impl_part = CORTEX_M35P_PARTNO,
                .name = "Cortex-M35P",
diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index b5d1da7f24..553672af4b 100644
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -45,19 +45,20 @@
  */
 enum cortex_m_impl_part {
        CORTEX_M_PARTNO_INVALID,
-       STAR_MC1_PARTNO    = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0x132), /* 
FIXME - confirm implementor! */
-       CORTEX_M0_PARTNO   = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC20),
-       CORTEX_M1_PARTNO   = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC21),
-       CORTEX_M3_PARTNO   = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC23),
-       CORTEX_M4_PARTNO   = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC24),
-       CORTEX_M7_PARTNO   = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC27),
-       CORTEX_M0P_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC60),
-       CORTEX_M23_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD20),
-       CORTEX_M33_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD21),
-       CORTEX_M35P_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD31),
-       CORTEX_M55_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD22),
-       REALTEK_M200_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd20),
-       REALTEK_M300_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd22),
+       STAR_MC1_PARTNO      = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0x132), /* 
FIXME - confirm implementor! */
+       CORTEX_M0_PARTNO     = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC20),
+       CORTEX_M1_PARTNO     = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC21),
+       CORTEX_M3_PARTNO     = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC23),
+       CORTEX_M4_PARTNO     = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC24),
+       CORTEX_M7_PARTNO     = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC27),
+       CORTEX_M0P_PARTNO    = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xC60),
+       CORTEX_M23_PARTNO    = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD20),
+       CORTEX_M33_PARTNO    = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD21),
+       INFINEON_SLX2_PARTNO = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xDB0),
+       CORTEX_M35P_PARTNO   = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD31),
+       CORTEX_M55_PARTNO    = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_ARM, 0xD22),
+       REALTEK_M200_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd20),
+       REALTEK_M300_PARTNO  = ARM_MAKE_CPUID(ARM_IMPLEMENTOR_REALTEK, 0xd22),
 };
 
 /* Relevant Cortex-M flags, used in struct cortex_m_part_info.flags */

--