[PATCH]: b46a298439 target/mips32: pracc write cp0 status register first

[gerrit]

This is an automated email from Gerrit.

"Walter J. <walter...@oss.cipunited.com>" just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/7914

-- gerrit

commit b46a298439401d298dc96ef7061a10e282256e07
Author: Walter Ji <walter...@oss.cipunited.com>
Date:   Wed Sep 27 17:29:47 2023 +0800

    target/mips32: pracc write cp0 status register first
    
    When user requested a change on cp0 status register,
    it may contain changes on EXL/ERL bits, and changes on
    these bits could lead to differnt behaviours on writing
    to other cp0 registers.
    
    Change-Id: Ic83039988c29c06ee134226b52de943c46d19da2
    Signed-off-by: Walter Ji <walter...@oss.cipunited.com>

diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c
index c85374ff47..6b02821a5b 100644
--- a/src/target/mips32_pracc.c
+++ b/src/target/mips32_pracc.c
@@ -873,12 +873,12 @@ int mips32_pracc_write_regs(struct mips32_common *mips32)
        };
 
        uint32_t cp0_write_data[] = {
+               /* status */
+               c0rs[0],
                /* lo */
                gprs[32],
                /* hi */
                gprs[33],
-               /* status */
-               c0rs[0],
                /* badvaddr */
                c0rs[1],
                /* cause */
@@ -887,6 +887,9 @@ int mips32_pracc_write_regs(struct mips32_common *mips32)
                c0rs[3],
        };
 
+       /* Write CP0 Status Register first, changes on EXL or ERL bits
+        * may lead to different behaviour on writing to other CP0 registers.
+        */
        for (size_t i = 0; i < ARRAY_SIZE(cp0_write_code); i++) {
                /* load CP0 value in $1 */
                pracc_add_li32(&ctx, 1, cp0_write_data[i], 0);

--