[PATCH]: ce49ed446f tcl/board: Added board configuration for Onethinx OTX18 module

[gerrit]

This is an automated email from Gerrit.

"Name of user not set <r.nooteb...@gmail.com>" just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/7986

-- gerrit

commit ce49ed446fda9b07a84a10bd8b262f1782be76f0
Author: RolfNoot <r.nooteb...@gmail.com>
Date:   Tue Dec 12 13:24:33 2023 +0100

    tcl/board: Added board configuration for Onethinx OTX18 module
    
    The OTX18 is based on PSoC63 in secured mode. CM0+ JTAG/SWD access is
    locked and the adapter shall connect through CM4 AP.
    
    Change-Id: Ibe4018fb7a2550f81b376621ad60f00d788c3a20
    Signed-off-by: RolfNoot <r.nooteb...@gmail.com>

diff --git a/tcl/board/otx18.cfg b/tcl/board/otx18.cfg
new file mode 100644
index 0000000000..a630dd9bed
--- /dev/null
+++ b/tcl/board/otx18.cfg
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Onethinx LoRaWAN Core module OTX-18
+# https://www.onethinx.com/module
+# The OTX-18 is a dual-core device with a locked CM0+ core and an accessible 
CM4 core.
+
+source [find target/swj-dp.tcl]
+
+adapter speed 1000
+
+global TARGET
+set TARGET psoc6.cpu
+
+swj_newdap psoc6 cpu -irlen 4 -ircapture 0x1 -irmask 0xf
+dap create psoc6.dap -chain-position psoc6.cpu
+
+proc init_reset { mode } {
+       global RESET_MODE
+       set RESET_MODE $mode
+
+       if {[using_jtag]} {
+               jtag arp_init-reset
+       }
+}
+
+# Utility to make 'reset halt' work as reset;halt on a target
+# It does not prevent running code after reset
+proc psoc6_deassert_post { target } {
+       # PSoC6 cleared AP registers including TAR during reset
+       # Force examine to synchronize OpenOCD target status
+       $target arp_examine
+
+       global RESET_MODE
+       global TARGET
+
+       if { $RESET_MODE ne "run" } {
+               $target arp_poll
+               $target arp_poll
+               set st [$target curstate]
+
+               if { $st eq "reset" } {
+                       # we assume running state follows
+                       # if reset accidentally halts, waiting is useless
+                       catch { $target arp_waitstate running 100 }
+                       set st [$target curstate]
+               }
+
+               if { $st eq "running" } {
+                       echo "$target: Ran after reset and before halt..."
+                       if { $target eq "psoc6.cpu.cm0" } {
+                               # Try to cleanly reset whole system
+                               # and halt the CM0 at entry point
+                               psoc6 reset_halt
+                               $target arp_waitstate halted 100
+                       } else {
+                               $target arp_halt
+                       }
+               }
+       }
+}
+
+target create psoc6.cm4 cortex_m -dap psoc6.dap -ap-num 2 -coreid 1
+psoc6.cm4 configure -work-area-phys 0x08000000 -work-area-size 0x4000 
-work-area-backup 0
+
+flash bank main_flash_cm4              psoc6 0x10000000 0 0 0 psoc6.cm4
+flash bank work_flash_cm4              psoc6 0x14000000 0 0 0 psoc6.cm4
+
+psoc6.cm4 cortex_m reset_config sysresetreq
+psoc6.cm4 configure -event reset-deassert-post "psoc6_deassert_post psoc6.cm4"
+
+if {[using_jtag]} {
+       jtag newtap psoc6 bs -irlen 18 -expected-id 0x2e200069
+}

--