This is an automated email from Gerrit.
"Tomas Vanek <van...@fbl.cz>" just uploaded a new patch set to Gerrit, which
you can find at https://review.openocd.org/c/openocd/+/8934
-- gerrit
commit 495eb02e1e327de56d9bb6b1dcae445035b0e9fc
Author: Tomas Vanek <van...@fbl.cz>
Date: Mon May 26 07:54:05 2025 +0200
doc: fix bp usage
Commit c8926d14579528bfcead1e179baf7cb846513db4
("cortex_a hybrid & context breakpoints") missed doc update.
Add info about settig hybrid & context breakpoints to chapter
15.5 Breakpoint and Watchpoint commands
Change-Id: I4a6fdc83a4c30ad8437c49796de8e6d8c6375c0c
Signed-off-by: Tomas Vanek <van...@fbl.cz>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index ca357c7802..1174ce9799 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -9705,12 +9705,14 @@ hardware support for a handful of code breakpoints and
data
watchpoints.
In addition, CPUs almost always support software breakpoints.
-@deffn {Command} {bp} [address len [@option{hw}]]
+@deffn {Command} {bp} [address [asid] len [@option{hw} | @option{hw_ctx}]]
With no parameters, lists all active breakpoints.
Else sets a breakpoint on code execution starting
at @var{address} for @var{length} bytes.
-This is a software breakpoint, unless @option{hw} is specified
-in which case it will be a hardware breakpoint.
+This is a software breakpoint, unless @option{hw} or @option{hw_ctx}
+is specified in which case it will be a hardware, context or hybrid breakpoint.
+The context and hybrid breakpoints require an additional parameter @var{asid}:
+address space identifier.
(@xref{arm9vectorcatch,,arm9 vector_catch}, or
@pxref{xscalevectorcatch,,xscale vector_catch},
for similar mechanisms that do not consume hardware breakpoints.)
--
